High-electron-mobility transistor devices

Patent metadata

Field	Value
Publication number	US-10651303-B2
Application number	US-201916291996-A
Country	US
Kind code	B2
Filing date	Mar 4, 2019
Priority date	Dec 2, 2016
Publication date	May 12, 2020
Grant date	May 12, 2020

Abstract

A device includes a first high electronic mobility transistor (HEMT) and a second HEMT. The first HEMT includes a first gate, a source coupled to the first gate, and a drain coupled to the first gate. The second HEMT includes a second gate coupled to the source and to the drain. The second HEMT has a lower threshold voltage than the first HEMT.

First claim

What is claimed is:

1. A method for fabricating a high electron mobility transistor (HEMT) device, the method comprising:
forming a first HEMT on a substrate, the first HEMT comprising a first gate, a source coupled to the first gate, and a drain coupled to the first gate, wherein the first gate comprises a first contact and is disposed on a layer comprising gallium;
forming a second HEMT on the substrate, the second HEMT comprising a second gate coupled to the source and to the drain, wherein the second gate comprises a second contact and is disposed on the layer comprising gallium;
depositing a first concentration of dopant in the first gate to form a first doped region between the first contact and the layer comprising gallium; and
depositing a second concentration of dopant in the second gate to form a second doped region between the second contact and the layer comprising gallium;
wherein the second concentration is less than the first concentration; and
wherein the second HEMT has a lower threshold voltage than the first HEMT.

2. The method of claim 1 , wherein said forming the first HEMT and said forming the second HEMT comprise:
forming a buffer layer over the substrate;
forming a layer comprising gallium nitride (GaN) over the buffer layer, wherein a two-dimensional electron gas (2DEG) layer is subsequently formed in the layer comprising GaN;
forming the layer comprising gallium by forming a layer comprising aluminum gallium nitride (AlGaN) over the layer comprising GaN;
forming the source and the drain in the layer comprising AlGaN;
forming the first gate above the layer comprising AlGaN; and
forming the second gate above the layer comprising AlGaN.

3. The method of claim 1 , wherein the dopant is a p-type dopant.

4. The method of claim 1 , further comprising forming a metal connection between the second gate and the source.

5. A method for fabricating a high electron mobility transistor (HEMT) device, the method comprising:
forming a first HEMT on a substrate, the first HEMT comprising a first gate, a source coupled to the first gate, and a drain coupled to the first gate, wherein the first gate is disposed on a layer comprising gallium, and wherein said forming the first HEMT comprises:
prior to said forming the first gate, implanting a first dose of an implant material to form a first implant region in the layer comprising gallium, wherein the first gate is then formed over the first implant region; and

forming a second HEMT on the substrate, the second HEMT comprising a second gate coupled to the source and to the drain, wherein the second gate is disposed on a layer comprising gallium, and wherein said forming the second HEMT comprises:
prior to forming the second gate, implanting a second dose of the implant material to form a second implant region in the layer comprising gallium, wherein the second gate is then formed over the second implant region;

wherein the second dose is less than the first dose; and
wherein the second HEMT has a lower threshold voltage than the first HEMT.

6. The method of claim 5 , wherein said forming the first HEMT and said forming the second HEMT comprise:
forming a buffer layer over the substrate;
forming a layer comprising gallium nitride (GaN) over the buffer layer, wherein a two-dimensional electron gas (2DEG) layer is subsequently formed in the layer comprising GaN;
forming the layer comprising gallium by forming a layer comprising aluminum gallium nitride (AlGaN) over the layer comprising GaN;
forming the source and the drain in the layer comprising AlGaN;
forming the first gate above the layer comprising AlGaN; and
forming the second gate above the layer comprising AlGaN.

7. The method of claim 5 , wherein the implant material comprises fluorine.

8. The method of claim 5 , wherein the first dose and the second dose are in a range between 10 12 per square centimeter and 10 14 per square centimeter.

9. A method for fabricating a high electron mobility transistor (HEMT) device, the method comprising:
forming a first HEMT on a substrate, the first HEMT comprising a first gate, a source coupled to the first gate, and a drain coupled to the first gate, wherein the first gate is disposed on a layer comprising gallium, and wherein said forming the first HEMT comprises:
prior to forming the first gate, forming a first recess in the layer comprising gallium; and
forming a first insulator in and extending from the first recess so that the first insulator has a first thickness and is at least partially embedded in the layer comprising gallium, wherein the first gate is then formed over the first insulator; and

forming a second HEMT on the substrate, the second HEMT comprising a second gate coupled to the source and to the drain, wherein the second gate is disposed on a layer comprising gallium, and wherein said forming the second HEMT comprises:
prior to forming the second gate, forming a second recess in the layer comprising gallium; and
forming a second insulator in and extending from the second recess so that the second insulator has a second thickness and is at least partially embedded in the layer comprising gallium, wherein the second gate is then formed over the second insulator;

wherein the second thickness is less than the first thickness; and
wherein the second HEMT has a lower threshold voltage than the first HEMT.

10. The method of claim 9 , wherein said forming the first HEMT and said forming the second HEMT comprise:
forming a buffer layer over the substrate;
forming a layer comprising gallium nitride (GaN) over the buffer layer, wherein a two-dimensional electron gas (2DEG) layer is subsequently formed in the layer comprising GaN;
forming the layer comprising gallium by forming a layer comprising aluminum gallium nitride (AlGaN) over the layer comprising GaN;
forming the source and the drain in the layer comprising AlGaN;
forming the first gate above the layer comprising AlGaN; and
forming the second gate above the layer comprising AlGaN.

11. The method of claim 9 , wherein the insulating material is selected from the group consisting of: aluminum oxide (Al 2 O 3 ), and silicon dioxide (SiO 2 ).

12. The method of claim 9 , wherein the first thickness and the second thickness are in a range between 200 Angstroms and 1000 Angstroms.

Assignees

• Vishay Siliconix
• Vishay Siliconix Llc

Inventors

• Shibib Ayman
• Terrill Kyle

Classifications

• H01L29/205

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic

• H01L29/7786

  Electricity · mapped topic

• H01L29/1066

  Electricity · mapped topic

• H01L29/42316

  Electricity · mapped topic