Detecting key positions to determine a type of cable

US10641839B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10641839-B2
Application numberUS-201715709140-A
CountryUS
Kind codeB2
Filing dateSep 19, 2017
Priority dateSep 20, 2012
Publication dateMay 5, 2020
Grant dateMay 5, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Examples disclose a computing system comprising a host device with a connection socket to support multiple types of cables by detecting a first key position and a second key position for determination of the type of cable. Further, the computing system comprises a switching circuit to determine a logic state of each of the key positions. Additionally, the switching circuit is to deliver power associated with the type of cable based on the logic states of the key positions.

First claim

Opening claim text (preview).

What is claimed is: 1. A non-transitory machine-readable storage medium encoded with instructions executable by a processor, the machine-readable storage medium comprising instructions to: obtain an impedance measurement at each key position of a connection socket; detect a plugged cable at a key position based on the obtained impedance measurement; in response to the detected plugged cable at the key position, determine an assigned power level associated to the key position; deliver a power through the plugged cable according to the determined assigned power level based on a logic state that represents assigned bits of data to signal a level of power to be delivered to the key position. 2. A non-transitory machine-readable storage medium as recited in claim 1 , wherein the impedance measurement of the key position that includes the plugged cable includes a minimal impedance. 3. A non-transitory machine-readable storage medium as recited in claim 1 , wherein each key position includes a type of mechanical attribute to match a type of the plugged cable. 4. A non-transitory machine-readable storage medium as recited in claim 3 , wherein each type of plugged cable includes a corresponding amount of associated power level. 5. A non-transitory machine-readable storage medium as recited in claim 1 , wherein each key position includes a logic state. 6. A non-transitory machine-readable storage medium as recited in claim 5 , wherein each logic state corresponds to a type of plugged cable and to a power level associated with the type of plugged cable. 7. A non-transitory machine-readable storage medium as recited in claim 1 , wherein the power is delivered through the plugged cable or a separate power cable of the same plugged cable. 8. A non-transitory machine-readable storage medium as recited in claim 1 , wherein the connection socket interfaces the plugged cable with a host device that supplies the power. 9. A host device that includes a connection socket with multiple key positions to fit different types of cables, the host device to perform operations comprising: obtain an impedance measurement at each of the multiple key positions of the connection socket; detect a connected cable at a key position based upon the obtained impedance measurement at the key position; deliver a power through the detected connected cable at the key position, wherein the power delivered is based on a logic state that represents assigned bits of data to signal a level of power to be delivered to the key position. 10. A host device as recited in claim 9 , wherein the host device to measure a minimal impedance on the key position that includes the connected cable. 11. A host device as recited in claim 9 , wherein each key position includes a type of mechanical attribute to match a type of the connected cable. 12. A host device as recited in claim 11 , wherein the host device includes a switching circuit to assign logic states to each key position, wherein each logic state corresponds to a type of connected cable and to a power level associated with the type of plugged cable. 13. A method executed by a computing device comprising: obtaining an impedance measurement at each key position of a connection socket; detecting, a plugged cable at a key position based upon the obtained impedance measurement at the key position; determining, in response to the detected plugged cable at the key position, an assigned voltage level associated to the key position; and delivering a power through the key position and the plugged cable based on the determined assigned voltage level based on a logic state that represents assigned bits of data to signal a level of power to be delivered to the key position. 14. A method as recited in claim 13 , wherein the impedance measurement of the key position that includes the plugged cable includes a minimal impedance. 15. A method as recited in claim 13 , wherein each key position includes a type of mechanical attribute to match a type of the plugged cable.

Assignees

Inventors

Classifications

  • Testing of lines, cables or conductors (testing of electric windings G01R31/72) · CPC title

  • Universal serial bus [USB] · CPC title

  • G06F13/409Primary

    Mechanical coupling (back panels H05K7/1438) · CPC title

  • G01R31/60Primary

    Identification of wires in a multicore cable · CPC title

  • the coupling part with coding means activating the switch to establish different circuits · CPC title

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Frequently asked questions

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What does patent US10641839B2 cover?
Examples disclose a computing system comprising a host device with a connection socket to support multiple types of cables by detecting a first key position and a second key position for determination of the type of cable. Further, the computing system comprises a switching circuit to determine a logic state of each of the key positions. Additionally, the switching circuit is to deliver power a…
Who is the assignee on this patent?
Hewlett Packard Development Co
What technology area does this patent fall under?
Primary CPC classification G06F13/409. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 05 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).