Method and apparatus for producing epitaxial wafer

US10640883B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10640883-B2
Application numberUS-201013395677-A
CountryUS
Kind codeB2
Filing dateSep 10, 2010
Priority dateSep 17, 2009
Publication dateMay 5, 2020
Grant dateMay 5, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

After removing deposit on a susceptor in an epitaxial growth furnace by a cleaning recipe (step S 101 ), a first epitaxial wafer is produced by growing an epitaxial layer on a first wafer based on a process recipe A (step S 102 ). Subsequently, a step of producing an epitaxial wafer by growing an epitaxial layer on a wafer based on a process recipe B including second control parameters set such that the epitaxial wafer has approximately the same film thickness profile as the first wafer (step S 103 ) is repeated a plurality of times to successively produce a plurality of epitaxial wafers (step S 104 ). The cleaning recipe, the process recipe A, and the process recipe B repeated a plurality of times are carried out repeatedly (step S 105 ).

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for producing epitaxial wafers using a single wafer processing epitaxial growth furnace, comprising the steps of: cleaning for removing deposit on a susceptor in the epitaxial growth furnace, wherein the epitaxial growth furnace includes a layer formation chamber which is substantially partitioned into an upper space and a lower space by the susceptor; after the step of cleaning, performing first wafer processing for obtaining a first epitaxial wafer by mounting a first wafer on the susceptor and growing an epitaxial layer on the first wafer based on first control parameters; without a step of cleaning for removing deposit on the susceptor in the epitaxial growth furnace after the first wafer processing, performing second wafer processing after transferring the first epitaxial wafer from the susceptor, for obtaining a second epitaxial wafer by mounting a second wafer on the susceptor and growing an epitaxial layer on the second wafer based on second control parameters set such that the second epitaxial wafer has approximately the same film thickness profile as the first epitaxial wafer; without a step of cleaning for removing deposit on the susceptor in the epitaxial growth furnace after the second wafer processing, performing at least third wafer processing after transferring the second epitaxial wafer from the susceptor, for obtaining a third epitaxial wafer by mounting a third wafer on the susceptor and growing an epitaxial layer on the third wafer based on the second control parameters set such that the third epitaxial wafer has approximately the same film thickness profile as the first and second epitaxial wafers; and wherein the first control parameters and the second control parameters each include a flow rate of reactive gas supplied to the upper space of the layer formation chamber and a flow rate of inert gas supplied to the lower space of the layer formation chamber, and the flow rate of the inert gas supplied to the lower space in the second control parameters is lower than the flow rate of the inert gas supplied to the lower space in the first control parameters, and wherein the first and the second control parameters are set such that a difference in epitaxial layer film thickness between the first wafer and the second wafer at a position 2 mm from each respective wafer's edge toward a center of the wafer (ROA2 difference) is 5 nm or less over the peripheries of the first and second wafers. 2. The method for producing epitaxial wafers according to claim 1 , wherein a process sequence of performing the step of cleaning, subsequently performing the step of the first wafer processing, and successively performing the steps of the second wafer processing and the at least third wafer processing after the first wafer processing, is carried out repeatedly. 3. The method for producing epitaxial wafers according to claim 1 , wherein the first control parameters and the second control parameters are different from each other in at least one of process conditions of the flow rate of reactive gas for growing the epitaxial layer, processing time, and a flow rate of dopant gas. 4. The method for producing epitaxial wafers according to claim 1 , wherein the flow rate of the reactive gas, which is included in the second control parameters, is lower than the flow rate of the reactive gas, which is included in the first control parameters. 5. The method for producing epitaxial wafers according to claim 4 , wherein a decrease in the flow rate of the inert gas supplied to the lower space in the second control parameters relative to the flow rate of the inert gas supplied to the lower space in the first control parameters is greater than a decrease in the flow rate of the reactive gas supplied to the upper space in the second control parameters relative to the flow rate of the reactive gas supplied to the upper space in the first control parameters. 6. The method for producing epitaxial wafers according to anyone of claims 1 to 3 and 4 , wherein at least a surface portion of the susceptor made of silicon carbide (SiC) is exposed by the cleaning step. 7. The method for producing epitaxial wafers according to anyone of claims 1 to 3 and 4 , wherein the reactive gas is trichlorosilane (SiHCl 3 ). 8. The method for producing epitaxial wafers according to anyone of claims 1 to 3 and 4 , wherein the inert gas is hydrogen gas (H 2 gas). 9. The method for producing epitaxial wafers according to claim 1 , wherein the epitaxial layer is grown on the second wafer based on second control parameters set such that the second epitaxial wafer has approximately the same film thickness profile at the wafer periphery as the first epitaxial wafer. 10. The method for producing epitaxial wafers according to claim 1 , wherein the second control parameters are set such that that a difference between the thickness of the epitaxial layer at the wafer periphery of the second epitaxial wafer and the thickness of the epitaxial layer at the wafer periphery of the first epitaxial wafer is reduced. 11. The method for producing epitaxial wafers according to claim 1 , wherein in the first and second control parameters, a gas pressure of the inert gas supplied to the lower space is greater than a gas pressure of the gas supplied to the upper space.

Assignees

Inventors

Classifications

  • Silicon, silicon germanium or germanium · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • Silicon · CPC title

  • Controlling or regulating (controlling or regulating in general G05) · CPC title

  • Epitaxial-layer growth · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10640883B2 cover?
After removing deposit on a susceptor in an epitaxial growth furnace by a cleaning recipe (step S 101 ), a first epitaxial wafer is produced by growing an epitaxial layer on a first wafer based on a process recipe A (step S 102 ). Subsequently, a step of producing an epitaxial wafer by growing an epitaxial layer on a wafer based on a process recipe B including second control parameters set such…
Who is the assignee on this patent?
Sakamoto Kenji, Tsuji Masayuki, Sumco Corp
What technology area does this patent fall under?
Primary CPC classification C30B25/12. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue May 05 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).