Isolator integrated circuits with package structure cavity and fabrication methods

Patent metadata

Field	Value
Publication number	US-10636778-B2
Application number	US-201816126577-A
Country	US
Kind code	B2
Filing date	Sep 10, 2018
Priority date	Dec 30, 2016
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

In described examples, an integrated circuit includes a leadframe structure, which includes electrical conductors. A first coil structure is electrically connected to a first pair of the electrical conductors of the leadframe structure. The first coil structure is partially formed on a semiconductor die structure. A second coil structure is electrically connected to a second pair of the electrical conductors of the leadframe structure. The second coil structure is partially formed on the semiconductor die structure. A molded package structure encloses portions of the leadframe structure. The molded package structure exposes portions of the first and second pairs of the electrical conductors to allow external connection to the first and second coil structures. The molded package structure includes a cavity to magnetically couple portions of the first and second coil structures.

First claim

What is claimed is:

1. An integrated circuit, comprising:
a leadframe structure, including electrical conductors;
a first coil structure electrically connected to a first pair of the electrical conductors of the leadframe structure, the first coil structure partially formed on a semiconductor die structure;
a second coil structure electrically connected to a second pair of the electrical conductors of the leadframe structure, the second coil structure partially formed on the semiconductor die structure; and
a molded package structure enclosing portions of the leadframe structure, the molded package structure exposing portions of the first and second pairs of the electrical conductors to allow external connection to the first and second coil structures, the molded package structure including a cavity to magnetically couple portions of the first and second coil structures.

2. The IC of claim 1 , wherein the cavity is sealed.

3. The IC of claim 1 , wherein portions of the first and second coil structures extend in the cavity.

4. The IC of claim 3 , wherein the molded package structure encloses portions of the first and second coil structures.

5. The IC of claim 4 , further comprising a ferrous material extending at least partially in the cavity.

6. The IC of claim 1 , wherein the molded package structure encloses portions of the first and second coil structures.

7. The IC of claim 1 , further comprising a ferrous material extending at least partially in the cavity.

8. The IC of claim 7 , wherein the ferrous material is formed on the semiconductor die structure.

Assignees

• Texas Instruments Inc

Inventors

• Male Barry Jon
• Cook Benjamin Stassen
• Neidorff Robert Alan
• Kummerl Steve

Classifications

• H04B10/803

  Free space interconnects, e.g. between circuit boards or chips · CPC title

• H01F38/14

  Inductive couplings {(for wireless supply or distribution of electric power using inductive coupling H02J50/10)} · CPC title

• H01L31/103

  Electricity · mapped topic

• H01L23/315

  Electricity · mapped topic

• H01L31/02005

  Electricity · mapped topic