Technique for inspecting semiconductor wafers

Patent metadata

Field	Value
Publication number	US-10636140-B2
Application number	US-201815982876-A
Country	US
Kind code	B2
Filing date	May 17, 2018
Priority date	May 18, 2017
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

A height of a pattern on a semiconductor wafer is determined by comparing a measured image of the pattern with a predicted image of the pattern, as produced by a shadow model. An estimated height of the pattern is provided as an input to the shadow model. The shadow model produces occluding contours that are used to generate predicted images. A set of predicted images are generated, each predicted image being associated with an estimated height. The estimated height corresponding to the predicted image most closely matching with the measured image is used as the height calculated by the shadow model.

First claim

What is claimed is:

1. A computer-implemented method for determining a height of a pattern on a semiconductor wafer, the method comprising:
obtaining a measured image of the pattern, wherein the measured image of the pattern is indicative of the height of the pattern;
producing, using a shadow model, a predicted image of the pattern, wherein the predicted image is associated with a function of an estimated height of the pattern, and wherein the estimated height of the pattern is provided as an input to the shadow model; and
calculating, by a computer processor, the height of the pattern by comparing the measured image of the pattern with the predicted image of the shadow of the pattern.

2. The method of claim 1 , wherein obtaining the measured image comprises using collecting image data from one or more side detectors.

3. The method of claim 1 , wherein producing the predicted image further comprises:
producing an occluding contour from planar contours of pattern edges that are determined to be occluding edges.

4. The method of claim 3 , wherein the method further comprises:
for each point of an occluding contour, for each direction, estimating other points that are impacted, and, adding a shadow value to each of the impacted points.

5. The method of claim 4 , wherein an edge detection technique is used to identify edge points.

6. The method of claim 4 , wherein the method further comprises:
using the occluding contour to generate the predicted image to be compared with the measured image.

7. The method of claim 6 , wherein the method further comprises:
generating a set of predicted images, each predicted image being associated with a respective estimated height.

8. The method of claim 7 , wherein the method further comprises:
comparing the measured image with each of the predicted images;
selecting the predicted image that matches most closely with the measured image; and
using the estimated height associated with the selected predicted image to be the calculated height of the pattern.

9. The method of claim 1 , wherein the shadow model is indicative of loss of yield caused by shadowing.

10. A system for determining a height of a pattern on a semiconductor wafer, the system comprising:
a memory; and
a computer processor, operatively coupled with the memory, to:
obtain a measured image of the pattern, wherein the measured image of the pattern is indicative of the height of the pattern;
produce, using a shadow model, a predicted image of the pattern, wherein the predicted image is associated with a function of an estimated height of the pattern, and wherein the estimated height of the pattern is provided as an input to the shadow model; and
calculate the height of the pattern by comparing the measured image of the pattern with the predicted image of the shadow of the pattern.

11. The system of claim 10 , wherein the measured image of the pattern is produced by collecting image data from one or more side detectors.

12. The system of claim 10 , wherein the system produces an occluding contour from planar contours of pattern edges that are determined to be occluding edges.

13. The system of claim 12 , wherein, for each point of an occluding contour, for each direction, the system estimates other points that are impacted, and, adds a shadow value to each of the impacted points.

14. The system of claim 13 , wherein an edge detection technique is used to identify edge points.

15. The system of claim 13 , wherein the occluding contour is used to generate the predicted image to be compared with the measured image.

16. The system of claim 15 , wherein a set of predicted images is generated, each predicted image being associated with a respective estimated height.

17. The system of claim 16 , wherein the the processor is further to:
compare the measured image with each of the predicted images;
select the predicted image that matches most closely with the measured image; and
use the estimated height associated with the selected predicted image to be the calculated height of the pattern.

18. The system of claim 10 , wherein the shadow model is indicative of loss of yield caused by shadowing.

Assignees

• Applied Materials Israel Ltd

Inventors

• Schwarzband Ishai
• Khristo Sergey
• Avniel Yan

Classifications

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• G06T7/001 Primary

  using an image reference approach · CPC title

• G06T7/507

  from shading (G06T7/586 takes precedence) · CPC title

• G06T7/564

  from contours · CPC title

• G06T2207/10061

  from scanning electron microscope · CPC title