Method providing for asymmetric pupil configuration for an extreme ultraviolet lithography process

Patent metadata

Field	Value
Publication number	US-2017228490-A1
Application number	US-201615040049-A
Country	US
Kind code	A1
Filing date	Feb 10, 2016
Priority date	Feb 10, 2016
Publication date	Aug 10, 2017
Grant date	—

Abstract

A pattern of features of an integrated circuit is provided. A configuration of a pupil of an extreme ultraviolet wavelength radiation beam (also referred to as an illumination mode), is selected. The selected configuration is an asymmetric, single pole configuration. At least one disparity is determined between a simulated imaging using the selected configuration and a designed imaging for the pattern of features. A parameter (also referred to as a compensation parameter) is then modified to address the at least one disparity, wherein the parameter at least one a design feature, a mask feature, and a lithography process parameter. A substrate is then exposed to the pattern of features using the selected configuration and the modified parameter.

First claim

What is claimed is:

1 . A method for extreme ultraviolet lithography (EUVL) process for a semiconductor device, comprising:
providing a pattern of features of an integrated circuit; selecting a configuration of a pupil of an extreme ultraviolet wavelength radiation beam, wherein the configuration is an asymmetric, single pole configuration; determining at least one disparity between a simulated imaging and a designed imaging for the pattern of features; modifying a parameter to address the at least one disparity, wherein the parameter at least one a design feature, a mask feature, and a lithography process parameter; and exposing a substrate to the pattern of features using the selected configuration and the modified parameter.

2 . The method of claim 1 , wherein the selecting the configuration includes selecting the asymmetric, single pole with a higher image contrast.

3 . The method of claim 1 , wherein the at least one disparity is one of a pattern shift, a best focus shift and a defocused pattern shift

4 . The method of claim 1 , wherein the modifying the parameter includes adjusting an optical proximity correction (OPC) feature.

5 . The method of claim 4 , wherein the adjusting the OPC feature includes adding a scattering bar.

6 . The method of claim 1 , wherein the selecting the configuration includes selecting the asymmetric, single pole configuration at a top edge of the pupil.

7 . The method of claim 1 , wherein the modifying the parameter includes the lithography process parameter of altering a depth of focus in the EUVL process.

8 . The method of claim 1 , wherein the modifying the parameter includes the design feature of changing a line width of a feature of the pattern of features.

9 . The method of claim 1 ,
wherein the determining the disparity includes identifying a pattern shift of a number of nanometers in a first direction, and wherein the modifying the parameter includes using an optical proximity correction (OPC) technique to shift the pattern the number of nanometers in a second direction.

10 . A method, comprising:
simulating an extreme ultraviolet (EUV) lithography process for a pattern of features of an integrated circuit, wherein the simulating includes defining a single, asymmetrical pole illumination mode; determining at least one disparity between the simulating and a design of the pattern of features, wherein the at least one disparity is one of a pattern shift, a best focus shift, and a defocused pattern shift; and modifying a parameter of the EUV lithography process or the pattern of features to reduce the at least one disparity.

11 . The method of claim 10 , wherein the modifying the parameter includes modifying a parameter of the EUV lithography process.

12 . The method of claim 11 , wherein the modifying is selecting a composition for an absorber layer on a photomask to be used in the EUV lithography process.

13 . The method of claim 10 , wherein the modifying the parameter is the parameter of the pattern of features.

14 . The method of claim 13 , wherein the modifying the parameter of the pattern of features includes changing a pitch of the pattern of features.

15 . The method of claim 13 , wherein the modifying the parameter includes:
performing an optical proximity correction (OPC) technique on the pattern of features.

16 . The method of claim 15 , wherein the performing the OPC technique includes adding a scattering bar to the pattern of features to make an order of diffraction a beam reflected from a mask stronger during the EUV lithography process.

17 . A method, comprising:
selecting an illumination mode of an extreme ultraviolet wavelength radiation beam, wherein the illumination mode is an asymmetric configuration; determining at least one disparity between a pattern exposed using the asymmetric configuration and an associated pattern defined in design data, wherein the at least one disparity is one of a pattern shift, a best focus shift, and a defocus pattern shift; determining a compensation parameter to mitigate the at least one disparity, wherein the determining includes applying at least one a model and a rule to select the compensation; and exposing a substrate to the pattern of features using the selected illumination mode and the compensation parameter.

18 . The method of claim 17 , wherein the determining the at least one disparity includes identifying the pattern shift; and
determining the compensation parameter includes selecting the compensation parameter type of an optical proximity correction (OPC).

19 . The method of claim 17 , wherein the determining the at least one disparity includes identifying the defocused pattern shift; and
determining the compensation parameter includes selecting the compensation parameter type of an optical proximity correction (OPC) and applying sub-resolution assist features.

20 . The method of claim 17 , wherein the determining the at least one disparity includes identifying the pattern shift; and
determining the compensation parameter includes modifying an absorber material on a photomask used during the exposing the substrate.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chung Chia-Chun
• Chen Norman
• Shih Chih-Tsung
• Chen Jeng-Horng
• Yu Shinn-Sheng
• Yen Anthony

Classifications

• G03F1/36

  Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes · CPC title

• G03F7/705

  Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions · CPC title

• G03F7/70091

  Illumination settings, i.e. intensity distribution in the pupil plane or angular distribution in the field plane; On-axis or off-axis settings, e.g. annular, dipole or quadrupole settings; Partial coherence control, i.e. sigma or numerical aperture [NA] · CPC title

• G03F7/70433

  Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors · CPC title

• G03F7/2004 Primary

  characterised by the use of a particular light source, e.g. fluorescent lamps or deep UV light · CPC title