Substrate structure and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-10631406-B2
Application number	US-201615177295-A
Country	US
Kind code	B2
Filing date	Jun 8, 2016
Priority date	Sep 4, 2009
Publication date	Apr 21, 2020
Grant date	Apr 21, 2020

Abstract

A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer.

First claim

What is claimed is:

1. A method, comprising: providing a substrate, the substrate comprising a patterned first metal layer on a first surface of the substrate, a patterned second metal layer on a second surface of the substrate, and a through hole extending between the first metal layer and the second metal layer; forming a first dielectric layer over the first metal layer and a second dielectric layer over the second metal layer; patterning the first dielectric layer; forming a photoresist layer on a surface of the second dielectric layer; forming a third metal layer over the first dielectric layer that was patterned and a fourth metal layer on the surface of the second dielectric layer not covered by the photoresist layer; reducing a thickness of the third metal layer to expose the first dielectric layer and form from remaining of the third metal layer a first trace layer embedded in the first dielectric layer; and removing the photoresist layer.

2. The method of claim 1 , further comprising, after forming the second dielectric layer, forming an opening in the second dielectric layer, the opening exposing the second metal layer.

3. The method of claim 2 , wherein forming the fourth metal layer includes forming the fourth metal layer in the opening in the second dielectric layer.

4. The method of claim 1 , wherein a thickness of the first dielectric layer is greater than a thickness of the second dielectric layer, and a difference between the thickness of the first dielectric layer and the thickness of the second dielectric layer is about 10-20 micrometers.

Assignees

• Advanced Semiconductor Eng

Inventors

• Lee Chih-Cheng

Classifications

• H10W70/6565

  recessed into the surface of the package substrates, interposers, or redistribution layers · CPC title

• H05K3/045

  by making a conductive layer having a relief pattern, followed by abrading of the raised portions · CPC title

• Y10T29/49156

  with selective destruction of conductive paths · CPC title

• H05K2203/025

  Abrading, e.g. grinding or sand blasting · CPC title

• H05K2201/0352

  Differences between the conductors of different layers of a multilayer · CPC title