Reduced thermal resistance attenuator on high-thermal conductivity substrates for quantum applications

Patent metadata

Field	Value
Publication number	US-10601096-B2
Application number	US-201815894620-A
Country	US
Kind code	B2
Filing date	Feb 12, 2018
Priority date	Feb 12, 2018
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

Techniques for facilitating reduced thermal resistance attenuator on high-thermal conductivity substrates for quantum applications are provided. A device can comprise a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level. The device can also comprise one or more grooved transmission lines formed in the substrate. The one or more grooved transmission lines can comprise a powder substance. Further, the device can comprise one or more copper heat sinks formed in the substrate. The one or more copper heat sinks can provide a ground connection. Further, the one or more copper heat sinks can be formed adjacent to the one or more grooved transmission lines.

First claim

What is claimed is:

1. A device, comprising:
a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level;
one or more grooved transmission lines formed in the substrate, wherein the one or more grooved transmission lines comprise a powder substance; and
one or more copper heat sinks, formed in the substrate, provide a ground connection and are formed adjacent to the one or more grooved transmission lines.

2. The device of claim 1 , wherein the one or more grooved transmission lines comprise powder selected from a group consisting of Nichrome (NiCr), copper, platinum, silver, and brass.

3. The device of claim 1 , wherein the thermal conductivity level of the substrate is in a range of around 100 to 200 watts per meter per Kelvin (W/m/K).

4. The device of claim 1 , wherein the substrate comprises a material selected from a group consisting of sapphire, silicon, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs).

5. The device of claim 1 , wherein the one or more grooved transmission lines facilitate thermalization to reduce a metal-substrate interfacial thermal resistance.

6. The device of claim 1 , further comprising a ground plane, wherein the substrate is over the ground plane.

7. The device of claim 1 , further comprising one or more resistors formed in the one or more grooved transmission lines and comprising a resistivity level higher than a defined resistivity level, wherein the one or more heat sinks absorb heat from the one or more resistors.

8. The device of claim 7 , wherein the defined resistivity level is around 100 microhm centimeter.

9. The device of claim 1 , wherein the device is a microwave attenuator device that is employed in cryogenic environments.

10. A microwave attenuator device, comprising:
a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level;
one or more grooved transmission lines formed in the substrate, wherein the one or more grooved transmission lines comprise a powder substance; and
one or more copper heat sinks, formed in the substrate, provide a ground connection and are formed adjacent to the one or more grooved transmission lines.

11. The microwave attenuator device of claim 10 , wherein the substrate comprises a material selected from a group consisting of sapphire, silicon, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs), and wherein the one or more grooved transmission lines comprise powder selected from a group consisting of Nichrome (NiCr), copper, platinum, silver, and brass.

12. The microwave attenuator device of claim 10 , wherein the thermal conductivity level of the substrate is in a range of about 100 to 200 watts per meter per Kelvin (W/m/K), wherein the one or more grooved transmission lines facilitate thermalization to reduce a metal-substrate interfacial thermal resistance.

13. A method, comprising:
milling one or more transmission lines in a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level;
filling the one or more transmission lines with a powder substance;
forming one or more copper heat sinks in the substrate adjacent to the one or more transmission lines; and
electrically grounding the one or more copper heat sinks.

14. The method of claim 13 , wherein the filling the one or more transmission lines with the powder substance comprises filling the one or more transmission lines with a powder selected from a group consisting of Nichrome (NiCr), copper, platinum, silver, and brass.

15. The method of claim 13 , wherein the thermal conductivity level of the substrate is in a range of about 100 to 200 watts per meter per Kelvin (W/m/K).

16. The method of claim 13 , wherein the substrate comprises a material selected from a group consisting of sapphire, silicon, fused silica, quartz, Magnesium Oxide (MgO), and Gallium Arsenide (GaAs).

17. The method of claim 13 , wherein the one or more transmission lines facilitate thermalization to reduce a metal-substrate interfacial thermal resistance.

18. The method of claim 13 , further comprising:
providing a ground plane, wherein the substrate is located over the ground plane.

19. The method of claim 13 , further comprising:
forming one or more resistors in the substrate, wherein the one or more resistors comprise an alloy comprising a high resistivity level, and wherein the one or more heat sinks absorb heat from the one or more resistors.

20. The method of claim 19 , wherein the high resistivity level comprises a resistivity level around 100 microhm centimeter.

Assignees

• IBM

Inventors

• Olivadese Salvatore Bernardo
• Gumann Patryk
• Gambetta Jay M
• Chow Jerry M

Classifications

• H01P1/30

  for compensation of, or protection against, temperature or moisture effects {; for improving power handling capability (H01P1/04, H01P1/08 take precedence)} · CPC title

• H01P11/003 Primary

  Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title

• H01P1/227 Primary

  Strip line attenuators (H01P1/23 takes precedence) · CPC title

• H01L39/00

  Electricity · mapped topic

• G06N10/00

  Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title