Monitoring the operation of a processor

Patent metadata

Field	Value
Publication number	US-10599547-B2
Application number	US-201715827890-A
Country	US
Kind code	B2
Filing date	Nov 30, 2017
Priority date	Dec 17, 2015
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

Embodiments of an invention for monitoring the operation of a processor are disclosed. In one embodiment, a system includes a processor and a hardware agent external to the processor. The processor includes virtualization logic to provide for the processor to operate in a root mode and in a non-root mode. The hardware agent is to verify operation of the processor in the non-root mode based on tracing information to be collected by a software agent to be executed by the processor in the root mode.

First claim

What is claimed is:

1. An apparatus comprising:
a hardware agent, external to a processor, to interrupt the processor to cause the processor to exit a virtual machine (VM) and initiate a sampling interval during which a software agent to be executed by the processor in a root mode is to collect tracing information to be used by the hardware agent to verify operation of the processor in a non-root mode, wherein
the tracing information is to be stored in one or more of a plurality of memory regions accessible to the hardware and inaccessible to the virtual machine,
the VM is to run guest software in the non-root mode and be hosted by a virtual machine monitor (VMM), and
the VMM is to run in the root mode in which host software is to directly control system resources.

2. The apparatus of claim 1 , wherein operation of the processor in the non-root mode includes execution of an ordinary software stack by the virtual machine.

3. The apparatus of claim 2 , wherein the tracing information is to include an initial checkpoint of state storage of the processor and a final checkpoint of the state storage of the processor.

4. The apparatus of claim 3 , wherein the hardware agent is to emulate execution of the ordinary software stack by the processor from an initial state based on the initial checkpoint to a final state and to compare the final state to the final checkpoint.

5. The apparatus of claim 4 , wherein the software agent is to record initial checkpoint information in connection with initiation of the sampling interval and to record final checkpoint information in connection with termination of the sampling interval.

6. The apparatus of claim 5 , wherein the hardware agent is also to interrupt the processor to terminate the sampling interval.

7. A method comprising:
executing, by a virtual machine (VM), an ordinary software stack;
interrupting, by a hardware agent external to a processor, the processor to cause the processor to exit the VM and initiate a sampling interval;
monitoring, by a software agent during the sampling interval, execution of the ordinary software stack;
storing, by the software agent, tracing information in a system memory;
interrupting, by the hardware agent, the processor to terminate the sampling interval; and
verifying, by the hardware agent, operation of the processor, wherein verifying includes using the tracing information to compare an actual final state to an emulated final state.

8. The method of claim 7 , wherein the software agent executes in a root mode of the processor.

9. The method of claim 8 , further comprising storing, by the software agent, a copy of an actual initial state.

10. The method of claim 9 , further comprising modifying, by the hardware agent based on emulation of execution of the ordinary software stack by the processor, the copy of the actual initial state to generate the emulated final state.

11. The method of claim 10 , further comprising marking, by the software agent in connection with initiation of the sampling interval, as read-only a plurality of memory regions to cause a virtual machine exit in connection with an attempt by the ordinary software stack to modify a memory region in the plurality of memory regions.

12. The method of claim 11 , further comprising adding, by the software agent in response to the virtual machine exit, the memory region to a list of traced memory regions.

13. The method of claim 12 , wherein the copy of the actual initial state includes a copy of the memory region before being modified by the ordinary software stack executing on the virtual machine during the sampling interval.

Assignees

• Intel Corp

Inventors

• Neiger Gilbert
• Anderson Andrew V
• Uhlig Richard A
• Durham David M
• Singhal Ronak
• Wu Xiangbin
• Kottapalli Sailesh

Classifications

• G06F13/24

  using interrupt (G06F13/32 takes precedence) · CPC title

• G06F2201/815

  Virtual · CPC title

• G06F9/455

  Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines · CPC title

• G06F11/3024 Primary

  where the computing system component is a central processing unit [CPU] · CPC title

• G06F11/3466 Primary

  Performance evaluation by tracing or monitoring · CPC title