Fast freeform source and mask co-optimization method

US10592633B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10592633-B2
Application numberUS-201815959123-A
CountryUS
Kind codeB2
Filing dateApr 20, 2018
Priority dateNov 21, 2008
Publication dateMar 17, 2020
Grant dateMar 17, 2020

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  5. First independent claim

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Abstract

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The present disclosure relates to lithographic apparatuses and processes, and more particularly to tools for optimizing illumination sources and masks for use in lithographic apparatuses and processes. According to certain aspects, the present disclosure significantly speeds up the convergence of the optimization by allowing direct computation of gradient of the cost function. According to other aspects, the present disclosure allows for simultaneous optimization of both source and mask, thereby significantly speeding the overall convergence. According to still further aspects, the present disclosure allows for free-form optimization, without the constraints required by conventional optimization techniques.

First claim

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What is claimed is: 1. A method for optimizing a lithographic process having an illumination and a patterning device pattern, the method comprising: obtaining respective initial descriptions of an illumination and a patterning device pattern for a lithographic process, wherein the patterning device pattern is to be imaged onto a substrate by the lithographic process using the illumination and wherein the illumination is represented as a plurality of radiation intensity pixels and the patterning device pattern is represented as a plurality of pattern pixels; iteratively adjusting, by a hardware computer system, gray scale values of the plurality of radiation intensity pixels and values of the plurality of pattern pixels, until a performance metric of the lithographic process is suitably configured with respect to both the illumination and the patterning device pattern; and producing electronic data corresponding to the respective adjusted configurations of the illumination and the patterning device pattern for which the performance metric of the lithographic process is suitably configured, the electronic data for enabling setup and/or modification of an aspect of the lithographic process and/or for enabling creation and/or modification a physical object or apparatus for use in the lithographic process. 2. The method of claim 1 , wherein the adjusting allows a fully flexible set of illumination points so that the illumination can have a free form. 3. The method of claim 1 , further comprising modifying the description of the illumination from a grayscale illumination to a modified illumination constrained by a manufacturability factor. 4. The method of claim 1 , further comprising modifying the description of the patterning device pattern from a grayscale pattern to a modified pattern constrained by a manufacturability factor. 5. The method of claim 1 , wherein the adjusting includes evaluating a cost function, wherein the cost function comprises a function of both the illumination and the patterning device pattern. 6. The method of claim 5 , wherein the cost function is formulated in terms of one of the following: worst case edge placement error (EPE) over a given process window, EPE least square function, EPE least p-norm function, inverse normalized image log slope (NILS) p-norm function, contour integral image slope, edge image value least square, edge image p-norm, and image log slope (ILS) p-norm. 7. The method of claim 1 , wherein the adjusting comprises iteratively adjusting gray scale values of the plurality of pattern pixels. 8. The method of claim 1 , wherein the adjusting comprises using a gradient of the performance metric of the lithographic process with respect to the illumination and the patterning device pattern. 9. The method of claim 8 , wherein the performance metric of the lithographic process is suitably configured when the gradient of the performance metric of the lithographic process with respect to both the illumination and the patterning device pattern is essentially zero. 10. The method of claim 1 , wherein the performance metric of the lithographic process comprises one or more selected from: an edge placement error (EPE), an image log slope, an inverse image log slope, and/or a contour integral of an image log slope. 11. The method of claim 1 , further comprising accelerating the method by performing a first co-optimization without constraints followed by performing a second co-optimization with constraints. 12. A method comprising: receiving descriptions of an illumination and a patterning device pattern, the patterning device pattern to be imaged by a lithographic process using the illumination; until the illumination and patterning device pattern are suitably configured for a performance metric of the lithographic process, selectively repeating: evaluating, by a hardware computer system, a cost function that is a function of both the illumination and the patterning device pattern the cost function, calculating, by the hardware computer system, a derivative of the cost function with respect to the illumination and a derivative of the cost function with respect to the patterning device pattern, and reconfiguring, by the hardware computer system, the illumination and patterning device pattern descriptions based on both the calculated derivatives; and producing electronic data corresponding to the respective reconfigurations of the illumination and the patterning device pattern, the electronic data for enabling setup and/or modification of an aspect of the lithographic process and/or for enabling creation and/or modification a physical object or apparatus for use in the lithographic process. 13. The method of claim 12 , wherein the illumination and patterning device pattern are suitably configured when a gradient based on the calculated derivatives has a value of essentially zero. 14. The method of claim 12 , further comprising characterizing the illumination as independent free form illumination points. 15. The method of claim 12 , wherein the illumination is represented as a plurality of radiation intensity pixels having gray scale values. 16. The method of claim 12 , wherein the patterning device pattern is represented as a plurality of pattern pixels having gray scale value. 17. The method of claim 12 , wherein reconfiguring the patterning device pattern description includes: using optical proximity correction; placing sub-resolution assist features; and re-characterizing the reconfigured patterning device pattern description. 18. The method of claim 12 , wherein the cost function is formulated in terms of worst case edge placement error over a given process window. 19. A non-transitory computer readable medium having instructions therein, the instructions, upon execution by a computer system, configured to cause the computer system to at least perform the method of claim 12 . 20. A non-transitory computer readable medium having instructions therein, the instructions, upon execution by a computer system, configured to cause the computer system to at least: obtain respective initial descriptions of an illumination and a patterning device pattern for a lithographic process, wherein the patterning device pattern is to be imaged onto a substrate by the lithographic process using the illumination and wherein the illumination is represented as a plurality of radiation intensity pixels and the patterning device pattern is represented as a plurality of pattern pixels; iteratively adjust gray scale values of the plurality of radiation intensity pixels and values of the plurality of pattern pixels, until a performance metric of the lithographic process is suitably configured with respect to both the illumination and the patterning device pattern; and produce electronic data corresponding to the respective adjusted configurations of the illumination and the patterning device pattern for which the performance metric of the lithographic process is suitably configured, the electronic data for enabling setup and/or modification of an aspect of the lithographic process and/or for enabling creation and/or modification a physical object or apparatus for use in the lithographic process.

Assignees

Inventors

Classifications

  • G06F30/398Primary

    Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

  • Optical proximity correction [OPC] · CPC title

  • Use of illumination settings tailored to particular mask patterns (details of setting means G03F7/70091) · CPC title

  • Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) · CPC title

  • Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions · CPC title

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What does patent US10592633B2 cover?
The present disclosure relates to lithographic apparatuses and processes, and more particularly to tools for optimizing illumination sources and masks for use in lithographic apparatuses and processes. According to certain aspects, the present disclosure significantly speeds up the convergence of the optimization by allowing direct computation of gradient of the cost function. According to othe…
Who is the assignee on this patent?
Asml Netherlands Bv
What technology area does this patent fall under?
Primary CPC classification G06F30/398. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 17 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).