Adjustable gain devices and methods for use therewith

US10587296B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10587296-B2
Application numberUS-201916248435-A
CountryUS
Kind codeB2
Filing dateJan 15, 2019
Priority dateJun 22, 2018
Publication dateMar 10, 2020
Grant dateMar 10, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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The disclosure relates to technology for an adjustable gain device that includes differential input terminals, differential output terminals, signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a negative input of the signal processing circuitry. The second cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a positive input of the signal processing circuitry. The adjustable gain device has a gain that is adjustable by adjusting values of the first and second cross-coupled segments, while maintaining a substantially consistent frequency response and a substantially consistent input impedance of the adjustable gain device, so long as a specified relationship between values of the first and second cross-coupled segments is kept substantially constant.

First claim

Opening claim text (preview).

What is claimed is: 1. An adjustable gain device, comprising: differential input terminals and differential output terminals of the adjustable gain device; signal processing circuitry between the differential input terminals and the differential output terminals of the adjustable gain device; a first cross-coupled segment coupled between the differential input terminals of the adjustable gain device and a negative (−) input of the signal processing circuitry; and a second cross-coupled segment coupled between the differential input terminals of the adjustable gain device and a positive (+) input of the signal processing circuitry; the adjustable gain device configured to have a gain that is adjustable by adjusting one or more component values of the first and second cross-coupled segments; and the adjustable gain device configured to maintain a substantially consistent frequency response and a substantially consistent input impedance when the gain of the adjustable gain device is adjusted by adjusting the one or more component values of the first and second cross-coupled segments. 2. The adjustable gain device of claim 1 , wherein the adjustable gain device is selected from the group consisting of: a multi-feedback (MFB) filter; a variable gain amplifier (VGA); a sigma-delta analog-to-digital converter (ADC); a mixer configured to perform frequency down-conversion; or a mixer configured to perform frequency up-conversion. 3. The adjustable gain device of claim 1 , wherein the substantially consistent frequency response and the substantially consistent input impedance of the adjustable gain device are maintained, when the gain of the adjustable gain device is adjusted by adjusting the one or more component values of the first and second cross-coupled segments, by keeping substantially constant a specified relationship between the component values of the first and second cross-coupled segments. 4. The adjustable gain device of claim 3 , further comprising a controller configured to adjust the component values of the first and second cross-coupled segments to achieve different gain settings of the adjustable gain device, while maintaining the substantially consistent frequency response and the substantially consistent input impedance of the adjustable gain device, by keeping substantially constant the specified relationship between the component values of the first and second cross-coupled segments. 5. The adjustable gain device of claim 3 , wherein: the first cross-coupled segment includes a first passive component having a first adjustable component value and a second passive component having a second adjustable component value; and the second cross-coupled segment includes a third passive component having the first adjustable component value and a fourth passive component having the second adjustable component value. 6. The adjustable gain device of claim 5 , wherein: the first passive component of the first cross-coupled segment is a first impedance component having a first adjustable impedance value (Z1a); the second passive component of the first cross-coupled segment is a second impedance component having a second adjustable impedance value (Z1b); the third passive component of the second cross-coupled segment is a third impedance component having the first adjustable impedance value (Z1a); the fourth passive component of the second cross-coupled segment is a fourth impedance component having the second adjustable impedance value (Z1b); the gain of the adjustable gain device is adjustable by adjusting the first adjustable impedance value (Z1a) and the second adjustable impedance value (Z1b); and the specified relationship between the component values of the first and second cross-coupled segments that is kept substantially constant to maintain the substantially consistent frequency response and the substantially consistent input impedance of the adjustable gain device, when the gain of the adjustable gain device is adjusted, comprises: Z ⁢ ⁢ 1 ⁢ a ⁡ ( s ) * Z ⁢ ⁢ 1 ⁢ b ⁡ ( s ) Z ⁢ ⁢ 1 ⁢ a ⁡ ( s ) + Z ⁢ ⁢ 1 ⁢ b ⁡ ( s ) for each value of s, wherein s is a variable that represents complex frequency. 7. The adjustable gain device of claim 6 , wherein: the first impedance component is a first resistor component having a first adjustable resistance value (R1a), and thus, the first adjustable impedance value (Z1a) of the first impedance component is equal to R1a; the second impedance component is a second resistor component having a second adjustable resistance value (R1 b), and thus, the second adjustable impedance value (Z1b) of the second impedance component is equal to R1 b; the third impedance component is a third resistor component having the first adjustable resistance value (R1a), and thus, the first adjustable impedance value (Z1a) of the third impedance component is equal to R1 a; the fourth impedance component is a fourth resistor component having the second adjustable resistance value (R1 b), and thus, the second adjustable impedance value (Z1b) of the fourth impedance component is equal to R1 b; the gain of the adjustable gain device is adjustable by adjusting the first adjustable resistance value (R1a) and the second adjustable resistance value (R1 b); and the specified relationship between the component values of the first and second cross-coupled segments that is kept substantially constant to maintain the substantially consistent frequency response and the substantially consistent input impedance of the adjustable gain device, when the gain of the adjustable gain device is adjusted, comprises: R ⁢ ⁢ 1 ⁢ a * R ⁢ ⁢ 1 ⁢ b

Assignees

Inventors

Classifications

  • with semiconductor devices only · CPC title

  • A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

  • the IC comprising input impedance adapting or controlling means · CPC title

  • A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

  • Amplitude, gain or attenuation · CPC title

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What does patent US10587296B2 cover?
The disclosure relates to technology for an adjustable gain device that includes differential input terminals, differential output terminals, signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a negative input of the signal processing circuitry. The second cro…
Who is the assignee on this patent?
Futurewei Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H04B1/16. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).