Magnetic structures, semiconductor structures, and semiconductor devices

Patent metadata

Field	Value
Publication number	US-10586830-B2
Application number	US-201816112125-A
Country	US
Kind code	B2
Filing date	Aug 24, 2018
Priority date	Jun 19, 2012
Publication date	Mar 10, 2020
Grant date	Mar 10, 2020

Abstract

Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced from one another by a coupler sub-region, exhibit oppositely directed magnetic orientations. The magnetic and coupler sub-regions may each be of a thickness tailored to form the magnetic region in a compact structure. Interference between magnetic dipole fields emitted from the magnetic region on switching of a free region in the memory cell may be reduced or eliminated. Also disclosed are semiconductor device structures, spin torque transfer magnetic random-access memory (STT-MRAM) systems, and methods of fabrication.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a magnetic structure comprising:
a fixed region exhibiting a fixed vertical magnetic orientation; and
a free region exhibiting a switchable vertical magnetic orientation, wherein the free region comprises an alternating structure of magnetic sub-regions and coupler sub-regions, wherein each of the coupler sub-regions is configured to effect anti-parallel coupling in at least one neighboring magnetic sub-region, more than one of the magnetic sub-regions located between two other magnetic sub-regions and having an oppositely directed magnetic orientation relative to a magnetic orientation of the two other magnetic sub-regions.

2. The semiconductor device of claim 1 , wherein the coupler sub-regions are configured to antiferromagnetically couple neighboring magnetic sub-regions.

3. The semiconductor device of claim 1 , wherein at least one magnetic sub-region of the plurality of magnetic sub-regions is located between to other magnetic sub-regions, the two other magnetic sub-regions having a magnetic orientation oppositely directed relative to the at least one magnetic sub-region.

4. The semiconductor device of claim 1 , wherein the magnetic sub-regions comprise cobalt, iron, nickel, and alloys thereof.

5. The semiconductor device of claim 1 , wherein the magnetic sub-regions comprise CoNiFeX, wherein X comprises one of B, Cu, Re, Ru, Rh, Hf, Pd, Pt, or C.

6. The semiconductor device of claim 1 , wherein the coupler sub-regions comprise one or more of ruthenium and rhodium.

7. The semiconductor device of claim 1 , wherein the coupler sub-regions comprise a monolayer of coupler material.

8. The semiconductor device of claim 1 , wherein an uppermost sub-region and a lowermost sub-region of the free region each comprise a magnetic sub-region.

9. The semiconductor device of claim 1 , wherein the fixed region comprises another alternating structure of magnetic sub-regions and coupler sub-regions.

10. The semiconductor device of claim 1 , wherein the fixed region comprises a lower region and a upper region separated by a coupler material, wherein the lower region and the upper region each comprise alternating regions of magnetic material and conductive material.

11. A system, comprising:
a processor;
a semiconductor device operably coupled to the processor, the semiconductor device including a magnetic structure comprising:
a fixed region having a fixed vertical magnetic orientation; and
a free region having a free vertical magnetic orientation,
at least one of the fixed region or the free region comprising an alternating structure of magnetic sub-regions and coupler sub-regions, wherein each magnetic sub-region of the magnetic sub-regions exhibits an oppositely directed vertical magnetic orientation than a nearest magnetic sub-region,
the magnetic structure configured to emit a stronger magnetic dipole field near sidewalls of the fixed region.

12. The system of claim 11 , wherein each of the coupler sub-regions effects anti-parallel coupling in at least one neighboring magnetic sub-structure.

13. The system of claim 11 , wherein each of the magnetic sub-regions and the coupler sub-regions has a thickness of less than about one nanometer.

14. The system of claim 11 , further comprising a reference region between the fixed region and the free region, the reference region comprising a magnetic material.

15. A semiconductor device, comprising:
a magnetic structure comprising:
a fixed region exhibiting a fixed vertical magnetic orientation, the fixed region comprising a first alternating structure of magnetic sub-regions and coupler sub-regions, more than one of the magnetic sub-regions of the first alternating structure of the fixed region located between two other magnetic sub-regions of the first alternating structure and having an oppositely directed magnetic orientation relative to a magnetic orientation of the two other magnetic sub-regions; and
a free region exhibiting a switchable vertical magnetic orientation, wherein the free region comprises a second alternating structure of magnetic sub-regions and coupler sub-regions.

16. The semiconductor device of claim 15 , wherein each of the coupler sub-regions of at least one of the fixed region or the free region is configured to effect anti-parallel coupling in at least one neighboring magnetic sub-region.

17. The semiconductor device of claim 15 , wherein the magnetic sub-regions of at least one of the fixed region or the free region have a thickness less than about 4 Angstroms.

18. The semiconductor device of claim 15 , wherein the coupler sub-regions of at least one of the fixed region or the free region have a thickness less than about 6 Angstroms.

19. The semiconductor device of claim 15 , wherein the magnetic sub-regions of the second alternating structure exhibit oppositely directed vertical magnetic orientations.

Assignees

• Micron Technology Inc

Inventors

• Kinney Wayne I
• Kula Witold
• Kramer Stephen J

Classifications

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/1673

  Reading or sensing circuits or methods · CPC title

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• H01F10/329

  Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect · CPC title

• H01F10/3218 Primary

  Exchange coupling of magnetic films via an antiferromagnetic interface (H01F10/3268 takes precedence) · CPC title