Method for lithograghic patterning of sensitive materials

Patent metadata

Field	Value
Publication number	US-10581003-B2
Application number	US-201716329947-A
Country	US
Kind code	B2
Filing date	Sep 1, 2017
Priority date	Sep 2, 2016
Publication date	Mar 3, 2020
Grant date	Mar 3, 2020

Abstract

Methods for patterning highly sensitive materials, such as organic materials, organic semiconductors, biomolecular materials, and the like, with photolithographic resolution are disclosed. In some embodiments, a germanium mask ( 304 ) is formed on the surface of the sensitive material ( 302 ), thereby protecting it from subsequent processes that employ harsh chemicals that would otherwise destroy the sensitive material ( 302 ). A microlithography mask ( 306 ) is patterned on the germanium mask layer ( 304 ), after which the germanium exposed by the microlithography mask ( 306 ) is removed by dissolving it in water. After transferring the pattern of the germanium mask ( 304 ) into the sensitive material ( 302 ), the germanium and microlithography masks ( 304, 306 ) are completely removed by immersing the substrate in water, which dissolves the remaining germanium and lifts off the microlithography mask material. As a result, the only chemical to which the sensitive material ( 302 ) is exposed during the patterning process is water, thereby mitigating or avoiding damage to the material ( 302 ).

First claim

What is claimed is:

1. A method for forming a device that includes an organic-material layer having a first pattern, the method comprising:
defining the first pattern in a first layer comprising a first material that includes germanium;
transferring the first pattern into a second layer comprising a second material that includes the organic material; and
removing the first layer by dissolving it in water.

2. The method of claim 1 wherein the first pattern is defined in the first layer such that it includes at least one feature that is less than or equal to ten microns.

3. The method of claim 1 wherein the first pattern is defined in the first layer by operations comprising:
forming the first layer as a full surface film disposed on the second layer;
forming a microlithographic mask on the first layer;
defining a second pattern in the microlithographic mask, wherein the second pattern includes at least one first region disposed on the first layer, the at least one first region having the first pattern, and wherein the second pattern exposes the first layer in at least one second region; and
exposing the first layer to water in the at least one second region.

4. The method of claim 3 wherein the first pattern is transferred into the second layer by etching the second material through the at least one second region, and wherein the removal of the first layer removes the at least one first region.

5. The method of claim 1 wherein the first pattern is defined in the first layer by operations comprising:
forming a microlithographic mask on a first surface of a substrate;
defining a second pattern in the microlithographic mask, wherein the second pattern includes at least one first region disposed on the first surface, the at least one first region having the first pattern, and wherein the second pattern exposes the first surface in at least one second region; and
forming the first layer over the microlithographic mask such that first material is disposed on photoresist in the at least one first region and disposed on the first surface in the at least one second region; and
removing the microlithographic mask such that the photoresist and the first material are removed from the at least one first region and the first material remains in the at least one second region.

6. The method of claim 5 wherein the first pattern is transferred into the second layer by operations comprising:
depositing the second layer over the first layer such that the second material is in contact with the first surface in the at least one first region and disposed on the first layer in the at least one second region; and
removing the second material from the at least one second region, wherein the second material is removed from the at least one second region when the first layer is dissolved in water.

7. The method of claim 1 wherein the device is formed as an organic electrochemical transistor (OECT) having a source, drain, and gate, and wherein the method further comprises:
forming a third layer comprising a dielectric material;
forming first and second electrodes on the dielectric material, wherein the first and second electrodes define the source and drain, and wherein the first and second electrodes are formed such that they are separated by a gap; and
forming the second layer such that it is disposed within the gap such that the second material is operative as the channel of the OECT;
wherein the transfer of the first pattern into the second layer defines the gate such that the gate includes the channel.

8. The method of claim 7 wherein the second layer is formed such that the second material comprises poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate).

9. The method of claim 7 further comprising:
forming an electrolyte disposed on the gate; and
forming a gate electrode that is electrically coupled with the gate through the electrolyte.

10. The method of claim 1 wherein the organic material is an organic semiconductor.

11. The method of claim 1 wherein the organic material is a self-assembled monolayer (SAM).

12. The method of claim 11 wherein the SAM comprises silane.

13. The method of claim 1 wherein the organic material is a light-emitting organic material.

14. The method of claim 13 wherein the light-emitting organic material is selected from the group consisting of organometallic chelates, fluorescent dyes, phosphorescent dyes, and conjugated dendrimers.

15. The method of claim 1 wherein the first layer consists of the first material and the first material consists of germanium.

16. The method of claim 1 further comprising forming the second layer such that the second material comprises poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate).

17. A method for forming a device that includes an organic-material layer having a first pattern, the method comprising:
providing a substrate having a dielectric layer that comprises a first surface;
forming first and second electrodes on the first surface, wherein the first and second electrodes are separated by a gap;
forming a first layer comprising a first material that includes the organic material, wherein the first layer is formed such that the first material resides within the gap;
forming a second layer comprising a second material that includes germanium;
patterning the second layer to define a second pattern;
transferring the second pattern into the first layer, wherein the transfer of the second pattern into the first layer defines the first pattern in the first layer; and
removing the second material by exposing it to water.

18. The method of claim 17 wherein the first layer is formed such that the first material comprises poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate).

19. The method of claim 17 wherein the first pattern and the second pattern are the same pattern.

20. The method of claim 17 wherein the first pattern is the inverse of the second pattern.

21. The method of claim 17 further comprising:
forming an electrolyte disposed on the first material residing in the gap; and
forming a third electrode that is electrically coupled with the first material through the electrolyte.

22. The method of claim 17 wherein the first material includes an organic semiconductor.

23. The method of claim 17 wherein the first material is a self-assembled monolayer (SAM).

24. The method of claim 23 wherein the SAM comprises silane.

25. The method of claim 17 wherein the first pattern includes at least one feature that is less than or equal to one micron.

Assignees

• Univ Leland Stanford Junior
• The Board of Trustee of the Leland Stanford Junior Universtiy

Inventors

• Melosh Nicholas Alexander
• Angle Matt R
• Hanna Mina-Elraheb S
• Kong Yifan

Classifications

• G03F7/422

  using liquids only (G03F7/421 takes precedence) · CPC title

• H01L51/0043

  Electricity · mapped topic

• H01L51/102

  Electricity · mapped topic

• H01L51/0558 Primary

  Electricity · mapped topic

• H01L51/0018

  Electricity · mapped topic