Microelectromechanical device and method for forming a microelectromechanical device having a support structure holding a lamella structure

US10580663B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10580663-B2
Application numberUS-201715695088-A
CountryUS
Kind codeB2
Filing dateSep 5, 2017
Priority dateSep 7, 2016
Publication dateMar 3, 2020
Grant dateMar 3, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for forming a microelectromechanical device is shown. The method comprises forming a cavity in a semiconductor substrate material, wherein the semiconductor substrate material comprises an opening for providing access to the cavity through a main surface area of the semiconductor substrate material. In a further step, the method comprises forming a support structure having a support structure material different from the semiconductor substrate material to close the opening at least partially by mechanically connecting the main surface area of the semiconductor substrate material with the bottom of the cavity. Furthermore, the method comprises a step of forming a lamella structure in the main surface area above the cavity such that the lamella structure is held spaced apart from the bottom of the cavity by the support structure.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for forming a microelectromechanical device, the method comprising: forming a cavity in a semiconductor substrate material, wherein the semiconductor substrate material comprises an opening for providing access to the cavity through a main surface area of the semiconductor substrate material; forming a support structure having a support structure material different from the semiconductor substrate material to close the opening at least partially by mechanically connecting the main surface area of the semiconductor substrate material with a bottom of the cavity, the forming of the support structure including the support structure material directly contacting a bottom surface of the bottom of the cavity; and forming a lamella structure in the main surface area of the semiconductor substrate material above the cavity such that the lamella structure is held spaced apart from the bottom of the cavity by the support structure, wherein forming the lamella structure includes forming a circumferential trench in the main surface area of the semiconductor substrate material into the cavity after the support structure is formed. 2. The method according to claim 1 , wherein the forming of the support structure comprises depositing the support structure material from the bottom of the cavity to the main surface area of the semiconductor substrate material. 3. The method according to claim 1 , wherein the support structure material comprises an isolating material. 4. The method according to claim 1 , wherein the forming of the support structure comprises a high density plasma oxide deposition. 5. The method according to claim 1 , wherein the forming of the support structure comprises at least partially closing the opening such that at least a part of the cavity remains in the semiconductor substrate material. 6. The method according to claim 1 , wherein the forming of the cavity comprises a silicon-on-nothing process or a Venezia process comprising forming small-scale openings in the semiconductor substrate material, connecting bottoms of the small-scale openings in the semiconductor substrate material to form the cavity, and closing the small-scale openings in the semiconductor substrate material above the cavity. 7. The method according to claim 6 , further comprising: forming the opening with a greater size than the small-scale openings in the semiconductor substrate material during the silicon-on-nothing process or the Venezia process, wherein the opening remains open when the small-scale openings in the semiconductor substrate material are closed. 8. The method according to claim 1 , wherein the circumferential trench encloses the support structure, and wherein the circumferential trench separates the lamella structure from the semiconductor substrate material at the main surface area of the semiconductor substrate material. 9. The method according to claim 1 , wherein the opening is formed such that a cross sectional area of the opening is smaller than 10% of a cross-sectional area of the cavity. 10. A microelectromechanical device, comprising: a semiconductor substrate material comprising a cavity, wherein the cavity is at least partially covered by a main surface area of the semiconductor substrate material; a support structure of a support structure material different from the semiconductor substrate material to mechanically connect the main surface area of the semiconductor substrate material with a bottom of the cavity, wherein the support structure material directly contacts a bottom surface of the bottom of the cavity; and a lamella structure in the main surface area of the semiconductor substrate material above the cavity such that the lamella structure is held spaced apart from the bottom of the cavity by the support structure, wherein the lamella structure includes a circumferential trench in the main surface area of the semiconductor substrate material into the cavity after the support structure is formed. 11. The microelectromechanical device of claim 10 , wherein the bottom of the cavity defines a depth measured substantially perpendicular to the main surface area of the semiconductor substrate material. 12. The microelectromechanical device of claim 10 , wherein the support structure includes the support structure material deposited from the bottom of the cavity to the main surface area of the semiconductor substrate material. 13. The microelectromechanical device of claim 10 , wherein the support structure material comprises an isolating material. 14. The microelectromechanical device of claim 10 , wherein the support structure material comprises a high density plasma oxide deposition. 15. The microelectromechanical device of claim 10 , wherein the semiconductor substrate material comprises an opening for providing access to the cavity through a main surface area of the semiconductor substrate material, and wherein the support structure is formed by at least partially closing the opening such that at least a part of the cavity remains in the semiconductor substrate material. 16. The microelectromechanical device according to claim 10 , wherein the circumferential trench encloses the support structure, and wherein the circumferential trench separates the lamella structure from the semiconductor substrate material at the main surface area of the semiconductor substrate material. 17. The microelectromechanical device according to claim 15 , wherein the opening is formed such that a cross sectional area of the opening is smaller than 10% of a cross-sectional area of the cavity.

Assignees

Inventors

Classifications

  • Arrangements of deformable or non-deformable structures, e.g. membrane and cavity for use in a transducer · CPC title

  • B81B3/0086Primary

    Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage · CPC title

  • H01L21/48Primary

    Electricity · mapped topic

  • H10W99/00Primary

    Subject matter not provided for in other groups of this subclass · CPC title

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What does patent US10580663B2 cover?
A method for forming a microelectromechanical device is shown. The method comprises forming a cavity in a semiconductor substrate material, wherein the semiconductor substrate material comprises an opening for providing access to the cavity through a main surface area of the semiconductor substrate material. In a further step, the method comprises forming a support structure having a support st…
Who is the assignee on this patent?
Infineon Technologies Dresden Gmbh
What technology area does this patent fall under?
Primary CPC classification B81B3/0086. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Mar 03 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).