Time to digital converter, phase difference pulse generator, radio communication device, and radio communication method
US-2017194972-A1 · Jul 6, 2017 · US
US10545462B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10545462-B2 |
| Application number | US-201916395861-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 26, 2019 |
| Priority date | Mar 19, 2018 |
| Publication date | Jan 28, 2020 |
| Grant date | Jan 28, 2020 |
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Official abstract text for this publication.
A time-to-voltage converter (TVC) that can include a timer integrated circuit (IC), and a charging circuit including a constant current source and a capacitor connected in series. The capacitor can be connected to a discharge pin of the timer IC. The TVC can further include a trigger circuit and a reset circuit to receive a start signal and a stop signal, respectively, from an input line, and accordingly generate a trigger signal or a reset signal to trigger or reset the timer IC. A switch can be configured to, under control of an output signal of the timer IC, connect the input line with the reset circuit. A voltage across the capacitor when the timer IC is reset indicates a time interval corresponding to the start and stop signals.
Opening claim text (preview).
What is claimed is: 1. A time-to-voltage converter (TVC), comprising: a 555 timer integrated circuit (IC); a charging circuit including a constant current source and a first capacitor connected in series, the first capacitor being connected to a discharge pin and a threshold pin of the 555 timer IC; a second capacitor connected to a control pin of the 555 timer IC configured to filter noise between a power supply and a ground; a trigger circuit including an RC differentiator circuit and configured to, receive a start signal from an input line, and generate a trigger signal corresponding to a voltage transition in the start signal to trigger the 555 timer IC; a reset circuit including an RC differentiator circuit and configured to, receive a stop signal from the input line via an AND gate, and generate a reset signal corresponding to the stop signal to reset the 555 timer IC; and the AND gate with output of the 555 timer IC and the input line as input, wherein a voltage across the first capacitor indicates a time interval corresponding to the start and stop signals. 2. The TVC of claim 1 , wherein the trigger signal corresponds to a voltage transition in the start signal. 3. The TVC of claim 1 , wherein the reset signal corresponds to a voltage transition in the stop signal. 4. The TVC of claim 1 , further comprising: an analog-to-digital converter (ADC) configured to convert the voltage across the capacitor to digital bits; and latches configured to store the digital bits when the 555 timer IC is reset.
Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60) · CPC title
Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title
by measuring electric or magnetic quantities changing in proportion to time · CPC title
having sawtooth shape · CPC title
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