Serializing access to fault tolerant memory

Patent metadata

Field	Value
Publication number	US-10540109-B2
Application number	US-201415314710-A
Country	US
Kind code	B2
Filing date	Sep 2, 2014
Priority date	Sep 2, 2014
Publication date	Jan 21, 2020
Grant date	Jan 21, 2020

Abstract

According to an example, a lock may be requested by a first redundancy controller from a parity media controller to perform a first sequence that accesses multiple memory modules in a stripe. The lock may be acquired for the stripe so that the first sequence may be performed on the stripe. The lock may then be released from the stripe.

First claim

What is claimed is:

1. A method to serialize concurrent accesses by multiple redundancy controllers to fault tolerant memory, the method comprising:
requesting, by a first redundancy controller, a lock from a parity media controller to perform a first sequence that accesses multiple memory modules in a stripe
acquiring the lock for the stripe;
performing the first sequence on the stripe; and
releasing the lock for the stripe,

wherein acquiring the lock for the stripe comprises:
determining from a stripe-specific flag in the parity media controller whether the stripe is locked or unlocked; and in response to the stripe being currently locked, adding the lock request to a conflict queue of the parity media controller for later grant of the lock when the current lock is released, and
in response to the stripe being unlocked, acquiring the lock for the stripe; and

wherein releasing the lock for the stripe comprises:
identifying that a duration of the lock has exceeded a predetermined time threshold;
removing the lock for the stripe;
flagging the stripe's parity cacheline as invalid.

2. The method of claim 1 , wherein acquiring the lock for the stripe comprises:
providing the first redundancy controller exclusive access to the stripe, wherein the exclusive access prevents a second redundancy controller from concurrently performing a second sequence that accesses multiple memory modules in the stripe during the lock.

3. The method of claim 1 , wherein releasing the lock for the stripe comprises unlocking the stripe in response to the first redundancy controller completing the first sequence that accesses multiple memory modules in the stripe.

4. The method of claim 1 , wherein the stripe includes data stored in at least one data memory modules and parity stored in at least one parity memory module.

5. The method of claim 1 , wherein the first redundancy controller comprises a server.

6. A computing device to serialize concurrent accesses by multiple redundancy controllers to fault tolerant memory, comprising:
a hardware redundancy controller to:
access a media controller that hosts a parity cacheline in a stripe prior to performing a sequence that accesses multiple memory modules in the stripe; and
obtain a lock for the stripe from the media controller, wherein to obtain the lock for the stripe, the media controller is to:
determine from a stripe-specific flag in the media controller whether the stripe is locked or unlocked; and
in response to the stripe being currently locked, add the lock request to a conflict queue for later granting of the lock when the current lock is released, and
in response to the stripe being unlocked, obtain the lock for the stripe; and

wherein the media controller is to:
identify that a duration of the lock has exceeded a predetermined time thershold;
release the lock for the stripe; and
flag the stripe's parity as invalid.

7. The computing device of claim 6 , wherein the hardware redundancy controller is to release the lock for the stripe in response to completion of the sequence that accesses multiple memory modules in the stripe.

8. The computing device of claim 6 further comprising the media controller comprising the conflict queue.

9. A system to serialize concurrent accesses by multiple redundancy controllers to fault tolerant memory, comprising:
a plurality of servers comprising a plurality of redundancy controllers, each of the redundancy controllers being dedicated to one of the plurality of servers;
a plurality of memory modules each including a media controller and a memory, wherein the memory modules are connected to the plurality of redundancy controllers through a memory fabric,
wherein each of the redundancy controllers is to:
determine that a first sequence accesses multiple memory modules in a stripe;
acquire a lock for the stripe from a parity media controller to perform the first sequence;
perform the first sequence on the stripe; and
release the lock for the stripe;

wherein to release the lock for the stripe, the media controller is to:
identify that a duration of the lock has exceeded a predetermined time thershold;
release the lock for the stripe; and
flag the stripe's parity cacheline as invalid.

10. The system of claim 9 , wherein to acquire the lock for the stripe, the media controller is to:
determine from a stripe-specific flag in the parity media controller whether the stripe is locked or unlocked;
add the lock request to a conflict queue for later grant of the lock in response to the stripe being locked; and
acquire the lock for the stripe in response to the stripe being unlocked.

11. The system of claim 10 , wherein the media controller comprises the conflict queue.

12. The system of claim 11 , wherein the conflict queue comprises a first in first out (FIFO) queue.

13. The system of claim 9 , wherein to release the lock for the stripe, a redundancy controller is to unlock the stripe in response to completing the first locked sequence.

14. The system of claim 9 , wherein a redundancy controller is to rebuild a stripe containing a parity cacheline flagged as invalid by performing a locked stripe rebuild sequence.

Assignees

• Hewlett Packard Entpr Dev Lp

Inventors

• Ray Harvey
• Gostin Gary
• Sherlock Derek Alan
• Lesartre Gregg B

Classifications

• G06F3/0614

  Improving the reliability of storage systems · CPC title

• G06F3/0637 Primary

  Permissions · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F11/108 Primary

  Parity data distribution in semiconductor storages, e.g. in SSD · CPC title

• G06F3/0644

  Management of space entities, e.g. partitions, extents, pools · CPC title