Read buffer architecture supporting integrated xor-reconstructed and read-retry for non-volatile random access memory (nvram) systems

Patent metadata

Field	Value
Publication number	US-2016196182-A1
Application number	US-201615067073-A
Country	US
Kind code	A1
Filing date	Mar 10, 2016
Priority date	Dec 11, 2013
Publication date	Jul 7, 2016
Grant date	—

Abstract

According to one embodiment, a method includes issuing a read request to read one or more units of data from at least one non-volatile random access memory (NVRAM) device. The read request includes one or more read voltage thresholds. The method also includes receiving the one or more data units and read command parameters used to read the one or more data units from the at least one NVRAM device. Moreover, the method includes storing error-free data units, the read command parameters used to read the error-free data units from the at least one NVRAM device, and a read completion status to one of a plurality of read buffers. The read completion status indicates a completed read when a data unit is error-free and indicates an incomplete read when a data unit is errored.

First claim

What is claimed is:

1 . A system, comprising:
a read buffer memory configured to store data to support integrated XOR reconstructed data and read-retry data, the read buffer memory comprising a plurality of read buffers, each read buffer being configured to store at least one data unit; and a processor and logic integrated with and/or executable by the processor, the logic being configured to cause the processor to:
receive one or more data units and read command parameters used to read the one or more data units from at least one non-volatile random access memory (NVRAM) device;
determine an error status for each of the one or more data units, wherein the error status indicates whether each data unit comprises errored data or error-free data; and
store error-free data units and the read command parameters used to read the error-free data units to a read buffer of the read buffer memory.

2 . The system as recited in claim 1 , wherein the logic is configured to cause the processor to:
reject each errored data unit without affecting a corresponding read buffer; and retry to read only errored data units from the at least one NVRAM device until each of the one or more data units is stored in the read buffer memory.

3 . The system as recited in claim 2 , wherein the logic configured to cause the processor to retry to read only errored data units from the at least one NVRAM device is configured to:
analyze the read command parameters for each errored data unit; and send one or more retry read requests to the at least one NVRAM device for each errored data unit until an error-free data unit is returned or a maximum number of retries has been exhausted, each retry read request comprising at least one different read voltage threshold and new read command parameters.

4 . The system as recited in claim 3 , wherein the logic configured to cause the processor to retry to read only errored data units from the at least one NVRAM device is configured to:
issue read requests for all other data units including a parity unit in a redundant array of inexpensive disks (RAID) stripe of each errored data unit when a maximum number of retries has been exhausted; receive error-free data units across each data unit of the RAID stripe; and XOR-accumulate all error-free data units in a corresponding locked data buffer for each errored data unit until each errored data unit is error-free in the read buffer memory, wherein when all stripe reads for an errored data unit are error-free, the read buffer comprises an error-free data unit, and wherein when any stripe read includes errors, any errored reads are retried with one or more adjusted read voltage threshold values.

5 . The system as recited in claim 4 , wherein locking a read buffer guarantees that the locked read buffer is not overwritten by other unrelated read commands.

6 . The system as recited in claim 2 , with the proviso that an errored data unit does not affect error-free data stored in the plurality of read buffers.

7 . The system as recited in claim 2 , wherein a maximum number of retries are attempted for each errored data unit, the maximum number of retries being set by a user.

8 . The system as recited in claim 1 , wherein once an error-free data unit is stored in a read buffer as a result of an original read or a threshold-voltage-adjusted read retry, the error-free data unit is not modified.

9 . The system as recited in claim 1 , wherein a number of data units read from the least one NVRAM device is less than or equal to a number of the read buffers.

10 . A method comprising:
issuing a read request to read one or more units of data from at least one non-volatile random access memory (NVRAM) device, the read request comprising one or more read voltage thresholds; receiving the one or more data units and read command parameters used to read the one or more data units from the at least one NVRAM device; and storing error-free data units, the read command parameters used to read the error-free data units from the at least one NVRAM device, and a read completion status to one of a plurality of read buffers, wherein the read completion status indicates a completed read when a data unit is error-free and indicates an incomplete read when a data unit is errored.

11 . The method as recited in claim 10 , further comprising:
performing error correction on the one or more data units, the error correction producing an error status for each data unit, wherein the error status indicates whether each data unit comprises errored data or error-free data; determining, individually for each of the one or more data units, which of the plurality of read buffers to store the one or more data units, wherein a read buffer memory comprises the plurality of read buffers; storing the read command parameters, the error status, and the read completion status in one of the plurality of read buffers for each errored data unit and locking the read buffer; and retrying to read each errored data unit from the at least one NVRAM device using at least one different read voltage threshold until all of the plurality of read buffers have a data unit stored therein.

12 . The method as recited in claim 11 , wherein the retrying to read each errored data unit from the at least one NVRAM device comprises:
analyzing the read command parameters for each errored data unit; and sending one or more retry read requests to the at least one NVRAM device for each errored data unit until an error-free data unit is returned or a maximum number of retries has been exhausted, each retry read request comprising at least one different read voltage threshold and new read command parameters.

13 . The method as recited in claim 12 , wherein the retrying to read each errored data unit from the at least one NVRAM device comprises:
issuing read requests for all other data units including a parity unit in a redundant array of inexpensive disks (RAID) stripe of each errored data unit; receiving error-free data units across each data unit of the RAID stripe; and XOR-accumulating all error-free data units in a corresponding locked data buffer for each errored data unit until each errored data unit is error-free in the read buffer, wherein when all stripe reads for an errored data unit are error-free, the read buffer comprises an error-free data unit, and wherein when any stripe read include errors, any errored reads are retried with one or more adjusted read threshold values.

14 . The method as recited in claim 12 , wherein the maximum number of retries is set by a user.

15 . The method as recited in claim 11 , wherein once an error-free data unit is stored in a read buffer as a result of an original read or a threshold-voltage-adjusted read retry, the error-free data unit is not modified.

16 . The method as recited in claim 11 , with the proviso that an errored data unit does not affect error-free data stored in the plurality of read buffers.

17 . The method as recited in claim 11 , wherein locking a read buffer guarantees that the locked read buffer is not overwritten by other unrelated read commands.

18 . The method as recited in claim 10 , wherein a number of data units read from the least one NVRAM device is less than or equal to a number of the read buffers.

19 . A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable/executable by a processor to cause the proc

Assignees

• IBM

Inventors

• Camp Charles J
• Fisher Timothy J
• Fry Aaron D
• Kumar Ashwitha Krishna
• Pierce David A
• Sallese Kevin E
• Simmons Lincoln T

Classifications

• G06F11/1088

  Reconstruction on already foreseen single or plurality of spare disks · CPC title

• G11C16/26

  Sensing or reading circuits; Data output circuits · CPC title

• G06F11/141 Primary

  for bus or memory accesses · CPC title

• G06F11/1072 Primary

  in multilevel memories · CPC title

• G06F11/108

  Parity data distribution in semiconductor storages, e.g. in SSD · CPC title