Control of phase currents of an inverter

Patent metadata

Field	Value
Publication number	US-10536096-B2
Application number	US-201716333127-A
Country	US
Kind code	B2
Filing date	Jul 18, 2017
Priority date	Sep 15, 2016
Publication date	Jan 14, 2020
Grant date	Jan 14, 2020

Abstract

The invention relates to a method for controlling phase currents (iU_WR 1 , iv_WR 1 , iw_WR 1 ) of a three-phase inverter (WR 1 ), the phase currents (iU_WR 1 , iv_WR 1 , iw_WR 1 ) of the inverter (WR 1 ) being controlled by way of a direct hysteresis current control and a selected phase of the inverter (WR 1 ) being additionally switched depending on a zero system current (i 0 _WR 1 ) of the inverter (WR 1 ).

First claim

The invention claimed is:

1. A method for controlling phase currents of a three-phase inverter, comprising:
controlling the phase currents of the inverter by directly controlling a hysteresis current by way of switching signals which each have a value range between −1 and +1,
additionally switching a selected phase of the inverter as a function of a zero sequence current of the inverter,
defining for the zero sequence current a first hysteresis window having a negative interval limit and a positive interval limit,
setting an additional switching signal to a value +1 when the zero sequence current is greater than the positive interval limit, setting the additional switching signal to the value −1 when the zero sequence current is smaller than the negative interval limit, and setting the additional switching signal to the value 0 when the zero sequence current exceeds or falls below the value zero,
setting the switching signal for the selected phase to the value −1 when the additional switching signal assumes the value +1, setting the switching signal for the selected phase to the value +1 when the additional switching signal assumes the value −1, and otherwise setting the switching signal for the selected phase to coincide with a standard switching signal for the selected phase, and
setting the switching signals for the other two phases to coincide with the standard switching signal for the respective other phase.

2. The method of claim 1 , further comprising changing the selected phase as a function of a phase relationship of output voltages of the inverter.

3. The method of claim 1 , further comprising using as the selected phase a phase having a largest absolute value of an output voltage of the inverter.

4. The method of claim 1 , further comprising using SDHC (Switched Diamond Hysteresis Control) current control as hysteresis current control.

5. A method for controlling phase currents of a plurality of parallel-connected three-phase inverters, wherein the phase currents of each inverter are controlled by
controlling the phase currents of each inverter by directly controlling a hysteresis current by way of switching signals which each have a value range between −1 and +1,
additionally switching a selected phase of each inverter as a function of a zero sequence current of each respective inverter,
defining for the zero sequence current a first hysteresis window having a negative interval limit and a positive interval limit,
setting an additional switching signal to a value +1 when the zero sequence current is greater than the positive interval limit, setting the additional switching signal to the value −1 when the zero sequence current is smaller than the negative interval limit, and setting the additional switching signal to the value 0 when the zero sequence current exceeds or falls below the value zero,
setting the switching signal for the selected phase to the value −1 when the additional switching signal assumes the value +1, setting the switching signal for the selected phase to the value +1 when the additional switching signal assumes the value −1, and otherwise setting the switching signal for the selected phase to coincide with a standard switching signal for the selected phase, and
setting the switching signals for the other two phases to coincide with the standard switching signal for the respective other phase.

6. The method of claim 5 , further comprising:
for each inverter, maintaining an actual current space vector for actual values of the phase currents of the inverter within a second hysteresis window around a setpoint current space vector,
forming the actual current space vector of a first inverter from all three phase currents of the first inverter,
forming the actual current space vector of every other inverter from just two phase currents of the other inverter by assuming that a sum of all three phase currents of every other inverter is zero, and
varying the selection of the two phase currents from which the actual current space vector of every other inverter is formed.

7. The method of claim 5 , further comprising controlling the phase currents of each inverter independently of the actual values of the phase currents of other inverters.

8. The method of claim 6 , further comprising using as the selected phase for each of the other inverters the phase whose phase current is not used to form the actual current space vector.

9. The method of claim 6 , further comprising using at each point in time the same setpoint current space vector for all inverters.

10. The method of claim 5 , further comprising forming each actual current space vector and each setpoint current space vector in a stator-fixed coordinate system.

11. The method of claim 6 , wherein the actual current space vector of the first inverter is formed according to

(

i

α

WR
1

i

β

WR
1

i

o

WR
1

)

=

1
3

⁢

(

2

-
1

-
1

0

3

-

3

1

1

1

)

Assignees

• Siemens Ag

Inventors

• Benesch Norbert
• Wiessmann Harald

Classifications

• H02M7/53871 Primary

  with automatic control of output voltage or current · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M7/493

  the static converters being arranged for operation in parallel · CPC title

• H02M2001/0054

  Electricity · mapped topic

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title