Pattern matching apparatus and computer program

Patent metadata

Field	Value
Publication number	US-10535129-B2
Application number	US-201113981963-A
Country	US
Kind code	B2
Filing date	Dec 7, 2011
Priority date	Jan 26, 2011
Publication date	Jan 14, 2020
Grant date	Jan 14, 2020

Abstract

The semiconductor inspection apparatus includes means for imaging a shape on a wafer or on an exposure mask; means for storing an image inspected by the imaging means; means for storing design data of the semiconductor circuit corresponding to a position on the wafer or on the exposure mask which are to be imaged by the imaging means; means for storing a design-data image obtained as a result of converting the design data into an image; means for generating a design-data ROI image by converting an interest drawing region found from a relative crude-density relation of a shape included in the design-data image into an image; and a position alignment section configured to carry out position alignment on the inspected image and the design-data image. The semiconductor inspection apparatus makes use of the design-data ROI image in order to identify a position at which the inspected image and the design-data image match each other or compute the degree of coincidence.

First claim

The invention claimed is:

1. A pattern matching apparatus comprising:
an image processing section configured to carry out pattern matching on an image by making use of a template created on the basis of a design data image created from design data,
wherein said template comprises a design data region of interest template having a plurality of regions of interest each of which corresponds to a characteristic region of said design data image,
wherein, after carrying out said pattern matching, said image processing section determines whether or not an image included in a predetermined evaluation region inside said template satisfies a predetermined condition, and
wherein said evaluation region is obtained by extracting an unpainted portion by
selection of an area of an image for expansion processing corresponding to an edge of a pattern included in the image; and
execution of selective expansion processing for the edge of the pattern included in the selected area of said design data image,
wherein only the selected area of the image is subjected to said expansion processing, and non-selected areas of the image are not expanded, and
wherein said expansion processing comprises thickening of said edge by setting a gradation of pixels adjacent to pixels corresponding to said edge to a same level as a gradation of said pixels corresponding to said edge.

2. The pattern matching apparatus according to claim 1 , wherein said evaluation region is a region obtained by carrying out expansion processing on said unpainted portion.

3. The pattern matching apparatus according to claim 1 wherein said image processing section carries out said determination in accordance with whether or not said evaluation region includes a predetermined pattern.

4. The pattern matching apparatus according to claim 1 wherein said template includes a repetitive pattern.

5. The pattern matching apparatus according to claim 4 wherein said evaluation region includes a portion in which the periodicity of said repetitive pattern is interrupted.

6. The pattern matching apparatus according to claim 1 wherein said evaluation region is small in comparison with said template.

7. The pattern matching apparatus according to claim 1 wherein said template is created by carrying out expansion processing selectively in a longitudinal direction or a transversal direction with respect to an image obtained on the basis of said design data.

8. The pattern matching apparatus according to claim 1 wherein said image processing section generates said evaluation region in such a way that pixel values corresponding to weights are different at a periphery and a center.

9. The pattern matching apparatus according to claim 8 wherein said image processing section determines whether or not said evaluation region includes a predetermined pattern in accordance with a value obtained as a result of carrying out an operation on pixel values of said evaluation region.

10. The pattern matching apparatus according to claim 1 wherein said evaluation region is a region extracted by carrying out expansion processing on a corner point extracted from said design data.

11. A non-transitory computer-readable medium upon which is embodied a sequence of programmable instructions to be executed by a computer to carry out pattern matching on an image by performing the following:
performing pattern matching on an image;
generating a design data region of interest template having a plurality of regions of interest each of which corresponds to a characteristic region of a design data image; and
determining, using the design data region of interest template created on the basis of design data, after executing said program to carry out said pattern matching, whether or not said image included in a predetermined evaluation region inside said template satisfies a predetermined condition,
wherein said evaluation region is obtained by extracting an unpainted portion by
selection of an area of an image for expansion processing corresponding to an edge of a pattern included in the image; and
execution of selective expansion processing for the edge of the pattern included in the selected area of the image obtained on the basis of said design data,
wherein only the selected area of the image is subjected to said expansion processing, and non-selected areas of the image are not expanded, and
wherein said expansion processing comprises thickening of said edge by setting a gradation of pixels adjacent to pixels corresponding to said edge to a same level as a gradation of said pixels corresponding to said edge.

12. The non-transitory computer-readable medium according to claim 11 , wherein said instructions further cause said computer to generate said evaluation region by carrying out expansion processing on said unpainted portion.

Assignees

• Kitazawa Masahiro
• Ikeda Mitsuji
• Abe Yuichi
• Taguchi Junichi
• Nagatomo Wataru
• Hitachi High Tech Corp

Inventors

• Kitazawa Masahiro
• Ikeda Mitsuji
• Abe Yuichi
• Taguchi Junichi
• Nagatomo Wataru

Classifications

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• G06T7/0004 Primary

  Industrial image inspection · CPC title

• G06T2207/10061

  from scanning electron microscope · CPC title

• H10P74/00

  Testing or measuring during manufacture or treatment of wafers, substrates or devices · CPC title