Array of optoelectronic structures and fabrication thereof

Patent metadata

Field	Value
Publication number	US-10529771-B2
Application number	US-201815906316-A
Country	US
Kind code	B2
Filing date	Feb 27, 2018
Priority date	Jul 1, 2016
Publication date	Jan 7, 2020
Grant date	Jan 7, 2020

Abstract

A method of fabrication of an array of optoelectronic structures includes first providing a crystalline substrate having cells corresponding to individual optoelectronic structures to be obtained. Each of the cells includes an opening to the substrate. Then, several first layer portions of a first compound semiconductor material are grown in each the opening to at least partly fill a respective one of the cells and form an essentially planar film portion therein. Next, several second layer portions of a second compound semiconductor material are grown over the first layer portions that coalesce to form a coalescent film extending over the first layer portions. Finally, excess portions of materials are removed, to obtain the array of optoelectronic structures. Each optoelectronic structure comprises a stack protruding from the substrate of: a residual portion of one of the second layer portions; and a residual portion of one of the first layer portions.

First claim

What is claimed is:

1. A method of fabrication of an array of optoelectronic structures, comprising:
providing a crystalline substrate with a template structure thereon, wherein the template structure comprises cells corresponding to individual optoelectronic structures to be obtained, each of the cells comprising an opening to the substrate;
growing several first layer portions of a first compound semiconductor material from seeds in each said opening, for each of said first layer portions to a least partly fill a respective one of the cells and form an essentially planar film portion therein;
removing upper portions of the template structure to expose said first layer portions of first compound semiconductor material;
growing several, second layer portions of a second compound semiconductor material over said first layer portions, for neighboring ones of said second layer portions to coalesce and thereby form a coalescent film extending over said first layer portions; and
removing excess portions of materials extending over the substrate that exceed defined dimensions of the cells at lateral boundaries of the cells to obtain said array of optoelectronic structures,
wherein each of the optoelectronic structures comprises a stack of: a residual portion of one of said second layer portions; and a residual portion of one of said first layer portions, the stack protruding from the substrate.

2. The method of fabrication according to claim 1 , wherein
growing said second layer portions is performed so as for said neighboring ones of said second layer portions to coalesce at locations corresponding to the lateral boundaries of the cells and form defective regions at said locations corresponding to said lateral boundaries.

3. The method of fabrication according to claim 1 , wherein said lateral boundaries are defined by walls of the template structure, wherein said walls extend perpendicularly to an average plane of the substrate, and
wherein growing the first layer portions is performed so as for said first layer portions to reach said walls, which form gaps between neighboring ones of the first layer portions grown.

4. The method of fabrication according to claim 1 , wherein:
growing the first layer portions is performed so as for neighboring ones of the first layer portions to coalesce at said locations corresponding to said lateral boundaries of the cells and thereby form a first coalesced film with first defective regions at said locations corresponding to said lateral boundaries; and
growing said second layer portions is performed so as for said neighboring ones of said second layer portions to coalesce and form a second coalescent film extending over said first coalesced film and comprising second defective regions at locations corresponding to said first defective regions.

5. The method of fabrication according to claim 1 , further comprising, while or after removing said excess portions,
removing, at least partly, lower portions and/or walls of the template structure, wherein said lower portions extend parallel to an average plane of the substrate and are in mechanical contact therewith and said walls extend perpendicularly to said average plane.

6. The method of fabrication according to claim 1 , wherein
removing excess portions is performed so as for said optoelectronic structures to comprise, each, a stack of:
said residual portion of one of said second layer portions;
said residual portion of one of said first layer portions; and
one or more lower portions of the template structure, wherein said lower portions extend parallel to an average plane of the substrate and are in mechanical contact therewith.

7. The method of fabrication according to claim 1 , wherein
growing said first layer portions comprises: growing first layer portions perpendicularly to an average plane of the substrate and then further growing said first layer portions parallel to said average plane, for said first layer portions to a least partly fill a respective one of the cells.

8. The method of fabrication according to claim 1 , wherein the crystalline substrate provided comprises one or more fiducial markers, the latter arranged at known relative positions from the template structure, and
wherein removing said excess portions is performed according to said fiducial markers.

9. The method of fabrication according to claim 1 , wherein said coalescent film is obtained as a blanket overgrowth.

10. The method of fabrication according to claim 9 , further comprising: structuring an outermost one of said additional planar films to partly expose a film underneath.

11. The method of fabrication according to claim 1 , wherein
said first compound semiconductor material comprises a binary III-V semiconductor material and said coalescent film comprises one or more of: a binary III-V semiconductor material, a ternary III-V semiconductor material; and a quaternary III-V semiconductor material.

12. The method of fabrication according to claim 1 , wherein
the substrate provided is a CMOS-fabricated substrate that comprises wires integrated in the substrate, wherein at least some of the wires are arranged so as to be in electrical contact with lower portions of the template structure.

13. The method of fabrication according to claim 12 , wherein
the method further comprises fabricating electrical conductors connecting, each, a residual portion of one of said second layer portions to one of the wires integrated in the substrate.

14. The method of fabrication according to claim 1 , wherein
the method further comprises joining the substrate to another substrate.

15. An optoelectronic device comprising an array of optoelectronic structures as obtained according to the method of claim 1 .

16. The optoelectronic device according to claim 15 , wherein
at least a subset of the optoelectronic structures are configured, each, as a photodetector.

17. The optoelectronic device according to claim 16 , wherein
at least a subset of the optoelectronic structures are configured, each, as a semiconductor laser.

18. The optoelectronic device according to claim 15 , wherein
at least a subset of the optoelectronic structures are configured, each, as a light-emitting device.

19. A method of fabrication of an array of optoelectronic structures, comprising:
providing a crystalline substrate with a template structure thereon, wherein the template structure comprises cells corresponding to individual optoelectronic structures to be obtained, each of the cells comprising an opening to the substrate;
growing several first layer portions of a first compound semiconductor material from seeds in each said opening, for each of said first layer portions to a least partly fill a respective one of the cells and form an essentially planar film portion therein;
obtaining one or more additional films of respective compound semiconductor materials, extending over a coalescent film;
growing several, second layer portions of a second compound semiconductor material over said first layer portions, for neighboring ones of said second layer portions to coalesce and thereby form the coalescent film extending over said first layer portions; and
removing excess portions of materials extending over the substrate that exceed defined dimensions of the cells at lateral boundaries of the cells to obtain said array of optoelectronic structures by removing material portions of each of the first compound semiconductor material, the second compound semiconductor material, and said respec

Assignees

• IBM

Inventors

• Borg Mattias B
• Czornomaz Lukas
• Deshpande Veeresh V
• Djara Vladimir
• Riel Heike E
• Schmid Heinz

Classifications

• H01S5/4025

  Array arrangements, e.g. constituted by discrete laser diodes or laser bar (H01S5/42 takes precedence) · CPC title

• H01S5/021

  Silicon based substrates · CPC title

• H01S5/0262

  Photo-diodes, e.g. transceiver devices, bidirectional devices (H01S5/0265 takes precedence) · CPC title

• H01S5/3013

  AIIIBV compounds · CPC title

• H01L27/14636

  Electricity · mapped topic