Manufacturing method for semiconductor device and semiconductor device
US-10090352-B2 · Oct 2, 2018 · US
US10529752B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10529752-B2 |
| Application number | US-201716085452-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 10, 2017 |
| Priority date | Mar 24, 2016 |
| Publication date | Jan 7, 2020 |
| Grant date | Jan 7, 2020 |
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The present disclosure relates to an image pickup device and an electronic apparatus that enable warping of a substrate to be suppressed. A first structural body including a pixel array unit is layered with a second structural body including an input/output circuit unit and outputting a pixel signal output from the pixel to the outside of the device, and a signal processing circuit; and a signal output external terminal and a signal input external terminal are arranged below the pixel array unit, the signal output external terminal being connected to the outside via a first through-via penetrating through a semiconductor substrate in the second structural body, the signal input external terminal being connected to the outside via a second through-via connected to an input circuit unit and penetrating through the semiconductor substrate. The signal output external terminal is electrically connected to the first through-via via a first rewiring line, the signal input external terminal is electrically connected to the second through-via via a second rewiring line, and a third rewiring line being electrically independent is arranged in a layer in which the first rewiring line and the second rewiring line are arranged. The present disclosure can be applied to, for example, the image pickup device, and the like.
Opening claim text (preview).
What is claimed is: 1. An image pickup device comprising: a first structural body and a second structural body that are layered, the first structural body including a pixel array unit in which a pixel that performs photoelectric conversion is two-dimensionally arrayed, the second structural body being positioned below the first structural body, the second structural body including an input circuit unit that inputs a predetermined signal from an outside of the device, an output circuit unit that outputs a pixel signal output from the pixel to the outside of the device, and a signal processing circuit; and an output unit and an input unit that are arranged below the pixel array unit of the first structural body, the output unit including the output circuit unit, a first through-via connected to the output circuit unit and penetrating through a semiconductor substrate constituting a part of the second structural body, and a signal output external terminal that connects the output circuit unit to the outside of the device via the first through-via, the input unit including the input circuit unit, a second through-via connected to the input circuit unit and penetrating through the semiconductor substrate, and a signal input external terminal that connects the input circuit unit to the outside of the device via the second through-via, wherein the signal output external terminal is electrically connected to the first through-via via a first rewiring line, the signal input external terminal is electrically connected to the second through-via via a second rewiring line, and a third rewiring line being electrically independent is arranged in a layer in which the first rewiring line and the second rewiring line are arranged. 2. The image pickup device according to claim 1 , wherein the third rewiring line is arranged in a region where the first rewiring line, the second rewiring line, the signal output external terminal, the signal input external terminal, the first through-via, and the second through-via are not arranged. 3. The image pickup device according to claim 1 , wherein the third rewiring line is formed in a shape and a position for suppressing warping of the device. 4. The image pickup device according to claim 1 , wherein the third rewiring line is formed in a shape and a position for reducing stress to be applied to the device by contraction of a protective film due to heat treatment of when the protective film is formed, the protective film protecting the first rewiring line and the second rewiring line. 5. The image pickup device according to claim 1 , wherein the third rewiring line is formed in a shape and a position for subdividing the protective film that protects the first rewiring line and the second rewiring line. 6. The image pickup device according to claim 1 , wherein the third rewiring line is formed with a large area or a large peripheral length on a surface of the second structural body. 7. The image pickup device according to claim 1 , wherein the third rewiring line is formed in a shape and a position for dissipating heat inside the device. 8. The image pickup device according to claim 1 , wherein the third rewiring line is arranged between a plurality of the first rewiring lines, between a plurality of the second rewiring lines, or between the first rewiring line and the second rewiring line. 9. The image pickup device according to claim 8 , wherein the third rewiring line is connected to a fixed voltage. 10. The image pickup device according to claim 8 , wherein the third rewiring line is connected to a terminal connected to a fixed voltage. 11. The image pickup device according to claim 1 , wherein the third rewiring line is arranged between signal lines that exchange data at a high speed. 12. The image pickup device according to claim 1 , wherein the third rewiring line connects a plurality of the signal output external terminals to each other, a plurality of the signal input external terminals to each other, or the signal output external terminal and the signal input external terminal to each other. 13. The image pickup device according to claim 12 , wherein the third rewiring line is connected to a fixed voltage. 14. An electronic apparatus comprising an image pickup device including: a first structural body and a second structural body that are layered, the first structural body including a pixel array unit in which a pixel that performs photoelectric conversion is two-dimensionally arrayed, the second structural body being positioned below the first structural body, the second structural body including an input circuit unit that inputs a predetermined signal from an outside of the device, an output circuit unit that outputs a pixel signal output from the pixel to the outside of the device, and a signal processing circuit; and an output unit and an input unit that are arranged below the pixel array unit of the first structural body, the output unit including the output circuit unit, a first through-via connected to the output circuit unit and penetrating through a semiconductor substrate constituting a part of the second structural body, and a signal output external terminal that connects the output circuit unit to the outside of the device via the first through-via, the input unit including the input circuit unit, a second through-via connected to the input circuit unit and penetrating through the semiconductor substrate, and a signal input external terminal that connects the input circuit unit to the outside of the device via the second through-via, wherein the signal output external terminal is electrically connected to the first through-via via a first rewiring line, the signal input external terminal is electrically connected to the second through-via via a second rewiring line, and a third rewiring line being electrically independent is arranged in a layer in which the first rewiring line and the second rewiring line are arranged.
Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors · CPC title
SSIS architectures; Circuits associated therewith · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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