Semiconductor chip

Patent metadata

Field	Value
Publication number	US-10522432-B2
Application number	US-201715413442-A
Country	US
Kind code	B2
Filing date	Jan 24, 2017
Priority date	Nov 28, 2014
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

According to various embodiments, a semiconductor chip may include: a semiconductor body region including a first surface and a second surface opposite the first surface; a capacitive structure for detecting crack propagation into the semiconductor body region; wherein the capacitive structure may include a first electrode region at least partially surrounding the semiconductor body region and at least substantially extending from the first surface to the second surface; wherein the capacitive structure further may include a second electrode region disposed next to the first electrode region and an electrically insulating region extending between the first electrode region and the second electrode region.

First claim

What is claimed is:

1. A semiconductor chip comprising:
a semiconductor body region including a first surface and a second surface opposite the first surface; and
a crack absorption region at least partially surrounding the semiconductor body region, wherein the crack absorption region extends from the first surface in a direction towards the second surface and wherein the crack absorption region includes a fracture strain greater than the semiconductor body region.

2. The semiconductor chip of claim 1 , wherein the crack absorption region substantially extends from the first surface to the second surface.

3. The semiconductor chip of claim 1 , wherein the crack absorption region extends at least from the first surface to the second surface.

4. The semiconductor chip of claim 1 , wherein the crack absorption region comprises a ductile material.

5. The semiconductor chip of claim 1 , wherein the crack absorption region comprises an elastomer.

6. The semiconductor chip of claim 1 , wherein the crack absorption region comprises a polymer.

7. The semiconductor chip of claim 1 , wherein the crack absorption region comprises a trench at least partially filled with at least one of a ductile material, an elastomer, and a polymer.

8. The semiconductor chip of claim 1 , wherein the crack absorption region forms a sidewall of the semiconductor chip.

9. The semiconductor chip of claim 1 , further comprising a first electrode region and a second electrode region, wherein the crack absorption region extends between the first electrode region and the second electrode region, and wherein the first electrode region, the crack absorption region and the second electrode region form a capacitive structure for detecting crack propagation into the semiconductor body region.

10. The semiconductor chip of claim 1 , wherein the crack absorption region comprises a dielectric elastomer.

11. The semiconductor chip of claim 1 , wherein the crack absorption region includes a fracture strain greater than about 5%.

12. The semiconductor chip of claim 1 , wherein the crack absorption region includes a fracture strain greater than about 50%.

13. The semiconductor chip of claim 1 , wherein the crack absorption region includes a fracture strain greater than about 100%.

14. The semiconductor chip of claim 1 , wherein a fracture toughness of the crack absorption region is greater than about 10 MPa m1/2.

15. The semiconductor chip of claim 1 , wherein the crack absorption region extends through the semiconductor body region.

16. A method for processing a wafer comprising:
forming a trench adjacent to a semiconductor chip of the wafer; and
forming a crack absorption region in the trench, wherein the crack absorption region extends from a first surface of the wafer in a direction towards a second surface of the wafer, the second surface being opposite to the first surface, wherein the crack absorption region includes a fracture strain greater than the semiconductor chip, wherein the crack absoprtion region forms a sidewall of a semiconductor body region of the semiconductor chip.

17. The method of claim 16 , wherein the crack absorption region includes a fracture strain greater than the semiconductor body region of the semiconductor chip.

18. A method of processing a semiconductor chip comprising:
forming a trench in the semiconductor chip, wherein the trench at least partially surrounds a semiconductor body region of the semiconductor chip and extends from a first surface of the semiconductor body region in a direction towards a second surface of the semiconductor body region opposite the first surface; and
forming a crack absorption region in the trench, wherein the crack absorption region includes a fracture strain greater than the semiconductor body region.

Assignees

• Infineon Technologies Ag

Inventors

• Gietler Herbert
• Pressl Robert

Classifications

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title