Systems and methods for improved semiconductor etching and component protection

Patent metadata

Field	Value
Publication number	US-10522371-B2
Application number	US-201615159478-A
Country	US
Kind code	B2
Filing date	May 19, 2016
Priority date	May 19, 2016
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.

First claim

What is claimed is:

1. A semiconductor processing system comprising: a remote plasma source; a delivery tube coupled with the remote plasma source; and a semiconductor processing chamber, wherein the semiconductor processing chamber comprises: a gas box coupled about a distal region of the delivery tube, wherein the gas box comprises a first gas box plate and a second gas box plate coupled with one another, wherein the second gas box plate defines a plurality of channels within a first upper surface of the second gas box plate, and wherein a lower surface of the coupled first gas box plate and the first upper surface of the second gas box plate define a flow path through the plurality of channels; a first annular support contacting the gas box at a first surface of the first annular support, wherein the first annular support and the gas box together define a first channel about an interior region of the semiconductor processing chamber, and wherein the second gas box plate at least partially contacts the first annular support along a second surface of the second gas box plate opposite the first surface of the second gas box plate contacting the first gas box plate and a gas distribution plate seated within the first channel.

2. The semiconductor processing system of claim 1 , further comprising:
an annular liner seated on the gas distribution plate; and
a top plate seated on the annular liner, wherein the annular liner and the top plate are both at least partially seated within the first channel.

3. The semiconductor processing system of claim 1 , further comprising a second annular support contacting the first annular support at a second surface of the first annular support opposite the first surface of the first annular support, wherein the second annular support and the first annular support together define a second channel about an interior region of the semiconductor processing chamber.

4. The semiconductor processing system of claim 3 , wherein the gas distribution plate comprises a first gas distribution plate, the semiconductor processing system further comprising a second gas distribution plate seated within the second channel.

5. The semiconductor processing system of claim 4 , wherein the first gas distribution plate and the second gas distribution plate comprise quartz, a ceramic, or coated aluminum.

6. The semiconductor processing system of claim 1 , further comprising at least one pin removably coupling the gas distribution plate with the first annular support.

7. The semiconductor processing system of claim 1 , wherein the delivery tube defines at least a portion of a channel between the remote plasma source and the gas box configured to allow precursor delivery through the delivery tube into the semiconductor processing chamber that bypasses the remote plasma source.

8. The semiconductor processing system of claim 7 , further comprising an insert positioned within the delivery tube, wherein the insert provides access to a mixing region of the insert from the remote plasma source and the at least a portion of a channel of the delivery tube.

9. The semiconductor processing system of claim 8 , wherein the mixing region of the insert comprises a first mixing section characterized by a tapered shape from the access to the mixing region of the insert, and wherein the mixing region of the insert comprises a second mixing section characterized by an expanding internal diameter from a position proximate the first mixing section to an outlet of the delivery tube.

10. The semiconductor processing system of claim 9 , wherein the mixing region of the insert further comprises a third mixing section characterized by a cylindrical shape having an internal diameter that is less than half the internal diameter of the delivery tube.

11. The semiconductor processing system of claim 1 , wherein the first gas box plate defines a port providing access to a channel of the plurality of channels defined in the second gas box plate.

12. The semiconductor processing system of claim 11 , wherein the plurality of channels desfined in the second gas box plate are configured to distribute a precursor received in the port radially outward through the plurality of channels defined in the second gas box plate.

13. The semiconductor processing system of claim 12 , wherein the second gas box plate defines at least one entry channel providing access from the plurality of channels to an interior region of the semiconductor processing chamber.

14. A semiconductor processing system comprising: a remote plasma source; a delivery tube coupled with the remote plasma source; and a semiconductor processing chamber, wherein the semiconductor processing chamber comprises: a gas box providing access to the semiconductor processing chamber, wherein the gas box comprises a first gas box plate coupled with a second gas box plate along a first surface of the second gas box plate, wherein the second gas box plate defines a plurality of channels within the first upper surface of the second gas box plate, and wherein the coupled first gas box plate and second gas box plate define a flow path between a lower surface of the first gas box plate and the first upper surface of the second gas box plate through the plurality of channels; a first annular support contacting the gas box at a first surface of the first annular support, wherein the first annular support and the gas box each define a portion of a first channel located at an interface of the gas box and the first annular support; a first gas distribution plate seated within the first channel; a second annular support contacting the first annular support at a second surface of the first annular support opposite the first surface of the first annular support, wherein the second annular support at least partially defines a second channel located about an interior region of the semiconductor processing chamber; and a second gas distribution plate seated within the second channel, wherein the first gas distribution plate and the second gas distribution plate comprise quartz.

15. The semiconductor processing chamber of claim 14 , further comprising:
an annular liner seated on the first gas distribution plate; and
a top plate seated on the annular liner, wherein the annular liner and the top plate are both at least partially seated within the first channel.

16. The semiconductor processing chamber of claim 14 , wherein the first gas distribution plate and the second gas distribution plate are characterized by a similar shape and each define a plurality of apertures located in rings about the gas distribution plate.

17. The semiconductor processing chamber of claim 14 , wherein the first gas box plate defines a port providing access to a channel of the plurality of channels defined in the second gas box plate.

18. The semiconductor processing chamber of claim 17 , wherein the plurality of channels desfined in the second gas box plate are configured to distribute a precursor received in the port radially outward through the plurality of channels defined in the second gas box plate.

19. The semiconductor processing chamber of claim 18 , wherein the second gas box plate defines at least one entry channel providing access from the plurality of channels to an interior region of the semiconductor processing chamber.

Assignees

• Applied Materials Inc

Inventors

• Tan Tien Fak
• Loh Lok Kee
• Lubomirsky Dmitry
• Jung Soonwook
• Choy Martin Yue
• Park Soonam

Classifications

• H10P72/0462

  characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

• H10P50/242 Primary

  of Group IV materials · CPC title

• H10P72/0421 Primary

  for drying etching · CPC title

• H01J37/3244

  Gas supply means · CPC title

• H01J37/32807

  Construction (includes replacing parts of the apparatus) · CPC title