Methods for device fabrication using pitch reduction

Patent metadata

Field	Value
Publication number	US-10522348-B2
Application number	US-201916249369-A
Country	US
Kind code	B2
Filing date	Jan 16, 2019
Priority date	Jul 30, 2007
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

Embodiments of a method for device fabrication by reverse pitch reduction flow include forming a first pattern of features above a substrate and forming a second pattern of pitch-multiplied spacers subsequent to forming the first pattern of features. In embodiments of the invention the first pattern of features may be formed by photolithography and the second pattern of pitch-multiplied spacers may be formed by pitch multiplication. Other methods for device fabrication are provided.

First claim

What is claimed is:

1. A method for semiconductor device fabrication, comprising:
forming a first pattern of features over a first mask, the features of the first pattern having a first width;
forming a second pattern of features over the first mask, the features of the second pattern having a second width less than the first width;
forming a second mask over the first pattern of features and the second pattern of features, a portion of the first pattern of features and the second pattern of features remaining exposed;
removing the exposed portions of the first pattern of features and the second pattern of features; and
transferring the first pattern of features and the second pattern of features to the first mask.

2. The method of claim 1 , wherein forming a first pattern of features over a first mask comprises forming the first pattern comprising photoresist features.

3. The method of claim 1 , wherein forming a second pattern of features over the first mask comprises forming the second pattern comprising spacers.

4. The method of claim 1 , wherein transferring the first pattern of features and the second pattern of features to the first mask comprises using remaining portions of the first pattern of features and the second pattern of features as a mask to remove portions of the first mask.

5. The method of claim 1 , further comprising transferring the first pattern of features and the second pattern of features to materials underlying the first mask.

6. A method for semiconductor device fabrication, comprising:
forming an etch stop on a first mask over a material;
forming a first pattern of features over the first mask, the features of the first pattern of features having a first width;
forming features in a selectively definable material over the first mask;
removing a portion of the features in the selectively definable material to form modified features in the selectively definable material;
conformally forming a spacer material over the modified features, the first mask, and the first pattern of features;
removing a portion of the spacer material to expose a portion of the first mask between each of the modified features in the selectively definable material and to form spacers adjacent to each of the modified features in the selectively definable material;
removing the modified features to form a second pattern of spacers over the first mask, the spacers of the second pattern of spacers having a second width less than the first width;
forming a second mask over the first pattern of features and the second pattern of spacers and leaving portions of at least the second pattern of spacers exposed;
removing the exposed portions of the second pattern of spacers; and
transferring the first pattern of features and the second pattern of spacers to the first mask and to one or materials underlying the first mask.

7. The method of claim 6 , wherein forming a first pattern of features over the first mask comprises forming the first pattern in a peripheral region.

8. The method of claim 6 , wherein forming features in a selectively definable material over the first mask comprises lithographically forming the features laterally adjacent to the first pattern of features.

9. The method of claim 6 , wherein removing a portion of the features in the selectively definable material to form modified features comprises isotropically etching the portion of the features to form the modified features in the selectively definable material.

10. The method of claim 6 , wherein forming a second pattern of spacers over the first mask comprises forming the second pattern of spacers by pitch multiplication.

11. The method of claim 6 , wherein transferring the first pattern of features and the second pattern of spacers comprises forming the first pattern of features having the first width in an array region and the second pattern of spacers having the second width to a peripheral region of the one or materials underlying the first mask.

12. The method of claim 6 , wherein forming an etch stop on a first mask over a material comprises forming at least one material selected from the group consisting of amorphous carbon, amorphous silicon, a silane oxide, a nitride, and Al 2 O 3 on the first mask over the material.

13. The method of claim 6 , wherein forming a first pattern of features over the first mask comprises photolithographically forming the first pattern of features in a selectively definable material overlying a hard mask.

Assignees

• Micron Technology Inc

Inventors

• Tran Luan C
• Giridhar Raghupathy

Classifications

• H10P76/4088

  Processes for improving the resolution of the masks · CPC title

• H10P76/4085 Primary

  characterised by the processes involved to create the masks · CPC title

• H10P76/405

  characterised by their composition, e.g. multilayer masks · CPC title

• H10P50/287

  by chemical means · CPC title

• H10P50/283

  by chemical means · CPC title