Transport system and method

US10520932B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10520932-B2
Application numberUS-201414323090-A
CountryUS
Kind codeB2
Filing dateJul 3, 2014
Priority dateJul 3, 2014
Publication dateDec 31, 2019
Grant dateDec 31, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transport system is provided. The transport system includes a stocker configured to store an assigned wafer carrier and having a gate port. The transport system also includes a semiconductor apparatus configured to transmit a request signal comprising a processed time according to a processing wafer carrier loaded on the semiconductor apparatus. The transport system further includes a vehicle configured to transport the assigned wafer carrier from the gate port to the semiconductor apparatus and a control system configured to control the vehicle. When the control system receives the request signal, the control system controls the stocker to transport the assigned wafer carrier inside of the stocker to the gate port at a start time, which is earlier than the processed time, and the control system controls the vehicle to transport the assigned wafer carrier from the gate port to the semiconductor apparatus.

First claim

Opening claim text (preview).

What is claimed is: 1. A transport system, comprising: a stocker, configured to store an assigned wafer carrier; a semiconductor apparatus, configured to process a wafer and transmit a request signal comprising a processed time according to a processing wafer carrier loaded on a load port thereof, wherein the processed time is defined as a point of time that a plurality of wafers of the processing wafer carrier have been processed by the semiconductor apparatus; a main track extending from an area over the stocker to an area over the semiconductor apparatus, wherein the main track has a first elevation position above the semiconductor apparatus, and has a check position located farther away from the semiconductor apparatus than the first elevation position; a circular track connected to the main track; a vehicle configured to transport the assigned wafer carrier; and a control system configured to: move the vehicle with the assigned wafer carrier from the stocker to the check position; move the vehicle with the assigned wafer carrier from the check position to the circular track when the semiconductor apparatus is occupied with the processing wafer carrier; and move the vehicle with the assigned wafer carrier to the first elevation position and load the assigned wafer carrier into the semiconductor apparatus after the processing wafer carrier is detached from the semiconductor apparatus; wherein when the control system receives the request signal, the control system estimates a delivery time according to the processed time and a detaching period, estimates a transport period during which the assigned wafer carrier is transported from the stocker to the load port, and estimates a start time according to the delivery time minus the transport period; wherein the delivery time is an estimated time when the assigned wafer carrier is loaded at the load port during a time later than the processed time and when the processing wafer carrier has been detached from the load port during the detaching period, wherein the control system controls the stocker to transport the assigned wafer carrier inside of the stocker to a gate port of the stocker at the start time, which is earlier than the processed time, and the control system controls the vehicle to transport the assigned wafer carrier from the gate port to the semiconductor apparatus. 2. The transport system as claimed in claim 1 , wherein the vehicle stops at the check position when a quality time of the assigned wafer carrier is less than a predetermined value. 3. The transport system as claimed in claim 1 , wherein the semiconductor apparatus comprises a recipe corresponding to a process performed on the plurality of wafers of the processing wafer carrier, the semiconductor apparatus obtains wafer carrier information corresponding to the processing wafer carrier, and the semiconductor apparatus estimates the processed time according to the recipe and the wafer carrier information. 4. The transport system as claimed in claim 1 , wherein the start time is earlier than the processed time by an Over Hoist Transport (OHT) period or greater, wherein the OHT period is defined as a period during which the assigned wafer carrier is transported by the vehicle. 5. The transport system as claimed in claim 1 , wherein the semiconductor apparatus transmits the request signal at a request time, the start time is earlier than the processed time by a process period or less, wherein the process period is defined as a period between a time at which the processing wafer carrier loaded at the semiconductor apparatus and the processed time. 6. A transport method, comprising: obtaining wafer carrier information corresponding to a processing wafer carrier loaded at a load port of a semiconductor apparatus, wherein the processing wafer carrier contains a plurality of wafers; estimating a processed time according to the wafer carrier information by the semiconductor apparatus, wherein the processed time is defined as a point of time that the plurality of wafers of the processing wafer carrier have been processed by the semiconductor apparatus; transmitting a request signal comprising the processed time to a control system by the semiconductor apparatus; assigning an assigned wafer carrier according to the request signal, and estimating a delivery time according to the processed time and a detaching period by the control system, wherein the delivery time is an estimated time when the assigned wafer carrier is loaded at the load port during a time later than the processed time and when the processing wafer carrier has been detached from the load port during the detaching period; estimating a transport period during which the assigned wafer carrier is transported from a stocker to the load port, and estimating a start time according to the delivery time minus the transport period by the control system; and starting to transport the assigned wafer carrier to the semiconductor apparatus at the start time, which is earlier than the processed time, wherein transporting the assigned wafer carrier comprises: moving a vehicle with the assigned wafer carrier from the stocker to a check position of a main track; moving the vehicle with the assigned wafer carrier from the check position to a circular track when the semiconductor apparatus is occupied with a processing wafer carrier; and moving the vehicle with the assigned wafer carrier to a first elevation position of the main track and loading the assigned wafer carrier into the semiconductor apparatus after the processing wafer carrier is detached from the semiconductor apparatus. 7. The transport method as claimed in claim 6 , wherein the vehicle with the assigned wafer carrier is moved to the circular track when the semiconductor apparatus is occupied with the processing wafer carrier and a priority value of the assigned wafer carrier is lower than a priority value of a following wafer carrier. 8. The transport method as claimed in claim 6 , wherein the vehicle with the assigned wafer carrier is moved to the circular track when the semiconductor apparatus is occupied with the processing wafer carrier and a quality time of the assigned wafer carrier is longer than a quality time of a following wafer carrier. 9. The transport method as claimed in claim 6 , wherein the vehicle with the assigned wafer carrier is stopped at the check position when the semiconductor apparatus is occupied with the processing wafer carrier and a quality time of the assigned wafer carrier is less than a predetermined value. 10. The transport method as claimed in claim 6 , wherein the vehicle with the assigned wafer carrier is stopped at the check position when the semiconductor apparatus is occupied with the processing wafer carrier and a priority value of the assigned wafer carrier is greater than a priority value of a following wafer carrier. 11. The transport method as claimed in claim 6 , wherein the start time is earlier than the processed time by an Over Hoist Transport (OHT) period or greater, wherein the OHT period is defined as a period during which the assigned wafer carrier is transported by the vehicle. 12. A transport method, comprising: obtaining wafer carrier information corresponding to a processing wafer carrier loaded at a first load port of a semiconductor apparatus, wherein the processing wafer carrier contains a plurality of wafers; estimating a processed time according to the wafer carrier information by the semiconductor apparatus, wherein the processed time is defined as a point of time that the plurality of wafers of the processing wafer carrier have been processed by the semiconductor apparatus; tra

Assignees

Inventors

Classifications

  • Manufacturing semiconductor wafers · CPC title

  • characterised by the transport system · CPC title

  • Cross-Sectional Technologies · mapped topic

  • Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS] · CPC title

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Frequently asked questions

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What does patent US10520932B2 cover?
A transport system is provided. The transport system includes a stocker configured to store an assigned wafer carrier and having a gate port. The transport system also includes a semiconductor apparatus configured to transmit a request signal comprising a processed time according to a processing wafer carrier loaded on the semiconductor apparatus. The transport system further includes a vehicle…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification G05B19/4189. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 31 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).