Semiconductor devices and methods for forming semiconductor devices

Patent metadata

Field	Value
Publication number	US-10516065-B2
Application number	US-201715642893-A
Country	US
Kind code	B2
Filing date	Jul 6, 2017
Priority date	Jul 7, 2016
Publication date	Dec 24, 2019
Grant date	Dec 24, 2019

Abstract

A semiconductor device includes an anode doping region of a diode structure arranged in a semiconductor substrate. The anode doping region has a first conductivity type. The semiconductor device further includes a second conductivity type contact doping region having a second conductivity type. The second conductivity type contact doping region is arranged at a surface of the semiconductor substrate and surrounded in the semiconductor substrate by the anode doping region. The anode doping region includes a buried non-depletable portion. At least part of the buried non-depletable portion is located below the second conductivity type contact doping region in the semiconductor substrate.

First claim

What is claimed is:

1. A semiconductor device, comprising:
an anode doping region of a diode structure arranged in a semiconductor substrate, the anode doping region having a first conductivity type; and
a second conductivity type contact doping region having a second conductivity type, the second conductivity type contact doping region being arranged at a surface of the semiconductor substrate and surrounded in the semiconductor substrate by the anode doping region,
wherein the anode doping region comprises a buried non-depletable portion,
wherein at least part of the buried non-depletable portion is located below the second conductivity type contact doping region in the semiconductor substrate,
wherein the buried non-depletable portion is completely surrounded by semiconductor material of the semiconductor substrate,
wherein a drift region of the diode structure is arranged between the anode doping region and a second surface of the semiconductor substrate,
wherein the drift region comprises the second conductivity type,
wherein at least a portion of the anode doping region is located between the second conductivity type contact doping region and the drift region.

2. The semiconductor device of claim 1 , wherein the anode doping region and the second conductivity type contact doping region are electrically connected to an anode electrode structure located at the surface of the semiconductor substrate.

3. The semiconductor device of claim 1 , wherein the buried non-depletable portion of the anode doping region laterally overlaps the whole of the second conductivity type contact doping region in a top view of the semiconductor device.

4. The semiconductor device of claim 1 , further comprising:
a cathode doping region of the diode structure arranged at the second surface of the semiconductor substrate,
wherein the cathode doping region comprises the second conductivity type,
wherein a dopant concentration of the cathode doping region is at least ten times larger than a dopant concentration of the drift region of the diode structure.

5. The semiconductor device of claim 1 , wherein the diode structure has a blocking voltage of at least 100 V.

6. The semiconductor device of claim 1 , wherein the buried non-depletable portion is configured to shield out the electric field to the second conductivity type contact doping region in reverse operation of the semiconductor device, wherein a doping of the buried non-depletable portion is so high that the buried non-depletable portion cannot be eliminated in the reverse operation, and wherein despite the presence of the second conductivity type contact doping region no increased reverse current flows in the reverse operation.

7. The semiconductor device of claim 1 , wherein the anode doping region further comprises a buried recombination portion, and wherein the buried recombination portion comprises a higher average concentration of recombination centers than the drift region of the diode structure.

8. The semiconductor device of claim 7 , wherein at least part of the buried recombination portion of the anode doping region is located vertically between the second conductivity type contact doping region and the buried non-depletable portion of the anode doping region.

9. The semiconductor device of claim 1 , wherein the anode doping region comprises a first conductivity type contact doping portion located laterally adjacently to the second conductivity type contact doping region at the surface of the semiconductor substrate.

10. The semiconductor device of claim 9 , wherein the first conductivity type contact doping portion of the anode doping region is located between two second conductivity type contact doping regions, and wherein a maximum lateral width of the first conductivity type contact doping portion between the two second conductivity type contact doping regions is less than 5 μm.

11. The semiconductor device of claim 9 , wherein the second conductivity type contact doping region is located between two first conductivity type contact doping portions of the anode doping region, and wherein a maximum lateral width of the second conductivity type contact doping region between the two first conductivity type contact doping portions is less than 5 μm.

12. The semiconductor device of claim 1 , wherein the buried non-depletable portion of the anode doping region is embedded in a depletable portion of the anode doping region.

13. The semiconductor device of claim 12 , wherein at least part of the depletable portion of the anode doping region is located between the buried non-depletable portion of the anode doping region and the drift region of the diode structure.

14. The semiconductor device of claim 12 , wherein a dopant concentration of the buried non-depletable portion of the anode doping region is at least five times larger than a dopant concentration of the depletable portion of the anode doping region.

15. A method for forming a semiconductor device, the method comprising:
arranging a decelerating mask layer at a surface of a semiconductor substrate; and
incorporating dopants into the semiconductor substrate through the decelerating mask, to simultaneously form at least one first conductivity type contact doping portion of an anode doping region located at the surface of the semiconductor substrate at a masked region of the semiconductor substrate and at least one buried non-depletable portion of the anode doping region located in the semiconductor substrate at unmasked regions of the semiconductor substrate.

16. A diode device, comprising:
an anode doping region arranged in a semiconductor substrate, the anode doping region having a first conductivity type;
a second conductivity type contact doping region having a second conductivity type, the second conductivity type contact doping region being arranged at a first surface of the semiconductor substrate and surrounded in the semiconductor substrate by the anode doping region; and
a cathode doping region of the diode structure arranged at a second surface of the semiconductor substrate,
wherein the anode doping region comprises a buried non-depletable portion,
wherein at least part of the buried non-depletable portion is located below the second conductivity type contact doping region in the semiconductor substrate,
wherein the cathode doping region comprises the second conductivity type,
wherein a dopant concentration of the cathode doping region is at least ten times larger than a dopant concentration of a drift region of the diode structure.

17. A method for forming a semiconductor device, the method comprising:
incorporating, by a first incorporation process, dopants of a first conductivity type to form a first doping area of an anode doping region to be formed in proximity to a surface of a semiconductor substrate;
forming an epitaxial layer on the surface of the semiconductor substrate;
incorporating, by a second incorporation process, dopants of the first conductivity type to form a second doping area of the anode doping region in proximity to a surface of the epitaxial layer, wherein a dopant concentration of the dopants incorporated into the second doping area is larger than a dopant concentration of dopants of the second conductivity type in the epitaxial layer, and wherein a vertical dimension of the second doping area is smaller than a vertical dimension of the epitaxial layer; and
annealing the semiconductor substrate and the epitaxial layer to enlarge the first doping area and the second doping area by diffusion of dopants to form a merged anode d

Assignees

• Infineon Technologies Ag

Inventors

• Mauder Anton
• Pfirsch Frank Dieter
• Schulze Hans-Joachim
• Seng Philipp
• Willmeroth Armin

Classifications

• H10P32/1406

  by ion implantation · CPC title

• H10P32/171

  being group IV material · CPC title

• H10P30/212

  Through-implantation · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/22

  using masks · CPC title