Semiconductor device

Patent metadata

Field	Value
Publication number	US-10510879-B2
Application number	US-201816106360-A
Country	US
Kind code	B2
Filing date	Aug 21, 2018
Priority date	Mar 22, 2018
Publication date	Dec 17, 2019
Grant date	Dec 17, 2019

Abstract

A semiconductor device includes first to third semiconductor layers stacked, and control electrodes provided in trenches extending in a stacking direction. The device further includes an insulating region and a fourth semiconductor layer. The insulating region is provided between first and second control electrodes adjacent to each other. The fourth semiconductor layer is provided between the insulating region and the first and second control electrodes, and between the insulating region and the first semiconductor layer. A first insulating film is provided between the first control electrode and the fourth semiconductor layer, and contacts the first control electrode and the fourth semiconductor layer. A second insulating film is provided between the second control electrode and the fourth semiconductor layer, and contacts the second control electrode and the fourth semiconductor layer. The insulating region has an end positioned at a level lower than a level of ends of the control electrodes.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a first semiconductor layer of a first conductivity type;
a second semiconductor layer of a second conductivity type provided on the first semiconductor layer;
a third semiconductor layer of the first conductivity type provided on the second semiconductor layer;
a plurality of control electrodes provided respectively in a plurality of trenches, the plurality of trenches having depths into the first semiconductor layer from a top surface of the third semiconductor layer, the plurality of control electrodes having ends positioned in the first semiconductor layer;
an insulating region provided between a first control electrode and a second control electrode of the plurality of control electrodes, the first control electrode and the second control electrode being adjacent to each other in a first direction along an interface between the first semiconductor layer and the second semiconductor layer, the insulating region extending in a second direction from the third semiconductor layer toward the first semiconductor layer, the insulating region having an end positioned in the first semiconductor layer, the end of the insulating region being positioned at a level in the second direction lower than the level in the second direction of the ends of the plurality of control electrodes;
a fourth semiconductor layer of the second conductivity type provided between the insulating region and the first semiconductor layer, between the insulating region and the first control electrode, and between the insulating region and the second control electrode;
a first insulating film provided between the first control electrode and the fourth semiconductor layer, the fourth semiconductor layer being in contact with a whole portion of the first insulating film positioned between the first control electrode and the fourth semiconductor layer;
a second insulating film provided between the second control electrode and the fourth semiconductor layer, the fourth semiconductor layer being in contact with a whole portion of the second insulating film positioned between the second control electrode and the fourth semiconductor layer; and
a first electrode connected to the third semiconductor layer and the fourth semiconductor layer.

2. The device according to claim 1 , wherein the insulating region extends in the second direction and a third direction, the third direction being along the interface between the first semiconductor layer and the second semiconductor layer, the third direction crossing the second direction.

3. The device according to claim 1 , further comprising a second electrode electrically connected to the first semiconductor layer,
the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer being positioned between the first electrode and the second electrode,
a distance in the second direction from the second electrode to the insulating region being shorter than a distance in the second direction from the second electrode to one of the plurality of control electrodes.

4. The device according to claim 3 , further comprising a fifth semiconductor layer of the first conductivity type provided between the first semiconductor layer and the second electrode, the fifth semiconductor layer including a first-conductivity-type impurity with a concentration higher than a concentration of a first conductivity-type impurity in the first semiconductor layer.

5. The device according to claim 3 , further comprising a fifth semiconductor layer of the second conductivity type provided between the first semiconductor layer and the second electrode.

6. The device according to claim 1 , wherein the first semiconductor layer has no portions provided between the first insulating film and the fourth semiconductor layer, and between the second insulating film and the fourth semiconductor layer.

7. The device according to claim 1 , further comprising:
a first contact region of the second conductivity type selectively provided between the first electrode and the second semiconductor layer, the first contact region including a second-conductivity-type impurity with a concentration higher than a concentration of a second-conductivity-type impurity in the second semiconductor layer; and
a second contact region of the second conductivity type selectively provided between the first electrode and the fourth semiconductor layer, the second contact region including a second-conductivity-type impurity with a concentration higher than a concentration of a second-conductivity-type impurity in the fourth semiconductor layer,
the first electrode contacting the first contact region and the second contact region.

8. The device according to claim 7 , wherein the first electrode includes a portion extending through the third semiconductor layer in the second direction, and contacts the first contact region that contacts the second semiconductor layer.

9. The device according to claim 7 , wherein
the second contact region contacts the fourth semiconductor layer, and
a boundary between the second contact region and the fourth semiconductor layer is positioned at a level in the second direction between a first level in the second direction and a second level in the second direction, the interface between the first semiconductor layer and the second semiconductor layer being positioned at the first level, an interface between the first electrode and the third semiconductor layer being positioned at the second level.

10. The device according to claim 1 , wherein
the insulating region has a side surface crossing the first direction, and a bottom surface crossing the second direction, and
the fourth semiconductor layer continuously covers the side surface and the bottom surface of the insulating region.

11. The device according to claim 1 , wherein the insulating region includes a dielectric.

12. The device according to claim 11 , wherein the dielectric includes an impurity of the second conductivity type.

13. The device according to claim 1 , wherein the insulating region includes a void.

14. The device according to claim 1 , further comprising:
another insulating region adjacent to the insulating region, the first semiconductor region including a portion positioned between the insulating region and the another insulating region, wherein
an amount of a second-conductivity-type impurity and an amount of a first-conductivity-type impurity are balanced in the fourth semiconductor layer and the first semiconductor layer at a level in the second direction where the portion of the first semiconductor layer contacts the fourth semiconductor layer.

15. The device according to claim 1 , further comprising a plurality of insulating regions including the insulating region and being arranged in the first direction,
the plurality of insulating regions further including another insulating region adjacent to the insulating region in the first direction, and
the plurality of control electrodes including three control electrodes arranged in the first direction between the insulating region and the another insulating region.

16. A semiconductor device, comprising:
a first semiconductor layer of a first conductivity type;
a second semiconductor layer of a second conductivity type provided on the first semiconductor layer;
a third semiconductor layer of the first conductivity type provided on the second semiconductor layer;
an insulating region extending in the first semiconductor layer from a top surface of the third semiconductor layer, the insulating regi

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Kawamura Keiko

Classifications

• H01L29/0696

  Electricity · mapped topic

• H01L29/41766

  Electricity · mapped topic

• H01L29/0865

  Electricity · mapped topic

• H01L29/7811

  Electricity · mapped topic

• H01L29/1095

  Electricity · mapped topic