Systems and methods for forming nanowires using anodic oxidation

US10510837B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10510837-B2
Application numberUS-201615373723-A
CountryUS
Kind codeB2
Filing dateDec 9, 2016
Priority dateMar 31, 2014
Publication dateDec 17, 2019
Grant dateDec 17, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Structures, devices and methods are provided for forming nanowires on a substrate. A first protruding structure is formed on a substrate. The first protruding structure is placed in an electrolytic solution. Anodic oxidation is performed using the substrate as part of an anode electrode. One or more nanowires are formed in the protruding structure. The nanowires are surrounded by a first dielectric material formed during the anodic oxidation.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure comprising: a semiconductor substrate; a protruding structure formed on the semiconductor substrate; and a plurality of nanowires and one or more nano-vias formed in the protruding structure, the semiconductor substrate including a ridge section that extends under the protruding structure, the plurality of nanowires comprising a first nanowire and a second nanowire, the first nanowire of the plurality of nanowires being disposed closer to a major surface of the semiconductor substrate than the second nanowire of the plurality of nanowires, the second nanowire of the plurality of nanowires having a diameter greater than a diameter of the first nanowire of the plurality of nanowires. 2. The structure of claim 1 , wherein each nanowire of the plurality of nanowires extends along a first direction, and the ridge section extends along the first direction. 3. The structure of claim 1 , wherein the protruding structure includes a nanowire-shaped structure, a nanoslate, a nanorod, or a nanostructure disposed between pads. 4. The structure of claim 1 , wherein the protruding structure has a width and a height, an aspect ratio of the protruding structure is equal to the height divided by the width, and the aspect ratio is larger than 1. 5. The structure of claim 1 , wherein the protruding structure includes a sidewall corresponding to a shape of which a top width is larger than a bottom width. 6. The structure of claim 1 , wherein the protruding structure includes (i) the plurality of nanowires, and (ii) dielectric material that surrounds each of the nanowires of the plurality of nanowires. 7. The structure of claim 6 , wherein a thickness of the dielectric material is greater in a lower portion of the protruding structure than in an upper portion of the protruding structure. 8. A device comprising: a source region formed on a semiconductor substrate; a drain region formed on the semiconductor substrate; and a protruding structure including a plurality of nanowires and one or more nano-vias disposed between the source region and the drain region, wherein the semiconductor substrate includes a ridge section extending under each nanowire of the plurality of nanowires, wherein a first nano-via of the one or more nano-vias is disposed between a first nanowire and a second nanowire of the plurality of nanowires, the first nano-via of the one or more nano-vias being filled with air. 9. The device of claim 8 , wherein the ridge section extends under the protruding structure. 10. The device of claim 9 , wherein the protruding structure includes a nanowire-shaped structure, a nanoslate, a nanorod, or a nanostructure disposed between pads. 11. The device of claim 9 , wherein the protruding structure has a width and a height, an aspect ratio of the protruding structure is equal to the height divided by the width, and the aspect ratio is larger than 1. 12. The device of claim 9 , wherein the protruding structure includes a sidewall corresponding to a shape of which a top width is larger than a bottom width. 13. The device of claim 9 , wherein the protruding structure includes (i) the plurality of nanowires, and (ii) dielectric material that surrounds each nanowire of the plurality of nanowires. 14. The device of claim 13 , wherein a thickness of the dielectric material is greater in a lower portion of the protruding structure than in an upper portion of the protruding structure. 15. The device of claim 8 , wherein each nanowire of the plurality of nanowires extends along a first direction, and the ridge section extends along the first direction. 16. A structure comprising: a semiconductor substrate; and a protruding structure formed on the semiconductor substrate and comprising (i) one or more nanowires, (ii) one or more nano-vias, and (iii) dielectric material that surrounds each nanowire of the one or more nanowires and each nano-via of the one or more nano-vias, a thickness of the dielectric material being greater in a lower portion of the protruding structure than in an upper portion of the protruding structure. 17. The structure of claim 16 , wherein the semiconductor substrate includes a ridge section that extends along the protruding structure, each nanowire of the one or more nanowires extends along a first direction, and the ridge section extends along the first direction. 18. The structure of claim 16 , wherein the protruding structure includes a nanowire-shaped structure, a nanoslate, a nanorod, or a nanostructure disposed between pads. 19. The structure of claim 16 , wherein the protruding structure has a width and a height, an aspect ratio of the protruding structure is equal to the height divided by the width, and the aspect ratio is larger than 1. 20. The structure of claim 16 , wherein the protruding structure includes a sidewall corresponding to a shape of which a top width is larger than a bottom width.

Assignees

Inventors

Classifications

  • Nanowires · CPC title

  • Formation by anodic treatments, e.g. anodic oxidation · CPC title

  • Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title

  • by anodic processes · CPC title

  • of semiconducting materials · CPC title

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What does patent US10510837B2 cover?
Structures, devices and methods are provided for forming nanowires on a substrate. A first protruding structure is formed on a substrate. The first protruding structure is placed in an electrolytic solution. Anodic oxidation is performed using the substrate as part of an anode electrode. One or more nanowires are formed in the protruding structure. The nanowires are surrounded by a first dielec…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd, Univ Nat Taiwan
What technology area does this patent fall under?
Primary CPC classification H01L29/0673. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 17 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).