MEMS device and process for RF and low resistance applications

Patent metadata

Field	Value
Publication number	US-10508022-B2
Application number	US-201715477193-A
Country	US
Kind code	B2
Filing date	Apr 3, 2017
Priority date	Nov 28, 2012
Publication date	Dec 17, 2019
Grant date	Dec 17, 2019

Abstract

MEMS device for low resistance applications are disclosed. In a first aspect, the MEMS device comprises a MEMS wafer including a handle wafer with one or more cavities containing a first surface and a second surface and an insulating layer deposited on the second surface of the handle wafer. The MEMS device also includes a device layer having a third and fourth surface, the third surface bonded to the insulating layer of the second surface of handle wafer; and a metal conductive layer on the fourth surface. The MEMS device also includes CMOS wafer bonded to the MEMS wafer. The CMOS wafer includes at least one metal electrode, such that an electrical connection is formed between the at least one metal electrode and at least a portion of the metal conductive layer.

First claim

What is claimed is:

1. A MEMS device comprising:
a MEMS wafer including a handle wafer with a cavity, a silicon device layer that comprises silicon, a first metal conductive layer deposited directly on a surface of the silicon device layer, an electrically conductive barrier layer deposited on the first metal conductive layer, and a bonding layer deposited on the electrically conductive barrier layer, wherein at least a portion of the silicon device layer is located between the first metal conductive layer and the cavity; and
a CMOS wafer bonded to the MEMS wafer, wherein the CMOS wafer includes a second metal conductive layer such that an electrical connection is formed between the CMOS wafer and the MEMS wafer, and wherein the second metal conductive layer of the CMOS wafer mixes with the bonding layer of the MEMS wafer during a eutectic reaction to create an electrical contact to the electrically conductive barrier layer on the first metal conductive layer, wherein the electrically conductive barrier layer prevents a eutectic reaction between the first metal conducive layer and the bonding layer.

2. The MEMS device of claim 1 , further comprising:
one or more stand-offs formed from the silicon device layer, wherein the first metal conductive layer extends to cover the one or more of stand-offs.

3. The MEMS device of claim 1 , wherein the bonding layer comprises germanium.

4. The MEMs device of claim 1 , wherein the electrical connection includes a connection between the bonding layer and the second metal conductive layer.

5. The MEMS device of claim 1 , wherein a portion of the silicon device layer is moveable in a vertical direction.

6. The MEMS device of claim 1 , wherein the electrically conductive barrier layer comprises titanium nitride.

Assignees

• Invensense Inc

Inventors

• Daneman Michael J
• Lim Martin
• Li Xiang
• Hung Li-Wen

Classifications

• B81C3/001

  Bonding of two components · CPC title

• B81B2207/07

  Interconnects · CPC title

• B81C2201/019

  Bonding or gluing multiple substrate layers · CPC title

• B81B3/0086 Primary

  Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage · CPC title