Interconnection structure and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-10504833-B2
Application number	US-201815893538-A
Country	US
Kind code	B2
Filing date	Feb 9, 2018
Priority date	Dec 30, 2014
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, and a second dielectric layer. The first conductor is partially in the first dielectric layer and having a portion protruding from the first dielectric layer. The etch stop layer is on the first dielectric layer and covering the protruding portion of the first conductor. The second dielectric layer is on the etch stop layer. A bottom surface of the second dielectric layer has a portion in a position lower than a top of the first conductor.

First claim

What is claimed is:

1. An interconnection structure, comprising:
a first dielectric layer;
a first conductor partially in the first dielectric layer and having a portion protruding from the first dielectric layer;
an etch stop layer on the first dielectric layer and has a raised portion covering the protruding portion of the first conductor, wherein the raised portion has a cap part over a top surface of the protruding portion of the first conductor and a spacer part over a sidewall of the protruding portion of the first conductor and thicker than the cap part; and
a second dielectric layer on the etch stop layer.

2. The interconnection structure of claim 1 , further comprising:
a second conductor at least partially in the first dielectric layer; and
a third conductor in the second dielectric layer and electrically connected to the second conductor.

3. The interconnection structure of claim 2 , further comprising:
a barrier layer between the etch stop layer and the third conductor.

4. The interconnection structure of claim 2 , wherein the second conductor has a portion protruding from the first dielectric layer.

5. The interconnection structure of claim 4 , further comprising:
a barrier layer over a sidewall of the protruding portion of the second conductor.

6. The interconnection structure of claim 1 , wherein a bottom surface of the second dielectric layer is lower than a top surface of the first conductor.

7. The interconnection structure of claim 2 , wherein the third conductor tapers toward the second conductor and is on opposite sidewalls of the second conductor.

8. An interconnection structure, comprising:
a first dielectric layer;
a first conductor at least partially in the first dielectric layer;
an etch stop layer on the first dielectric layer;
a second dielectric layer on the etch stop layer, wherein an interface between the etch stop layer and the second dielectric layer has a first portion in a first position lower than a top of the first conductor and a second portion in a second position higher than the top of the first conductor; and
a second conductor in the second dielectric layer and electrically connected to the first conductor, wherein the second conductor has an extending portion that extends through the first portion of the interface between the etch stop layer and the second dielectric layer and the extending portion of the second conductor is on opposite sidewalls of the first conductor.

9. The interconnection structure of claim 8 , wherein the second conductor tapers toward the first conductor.

10. The interconnection structure of claim 8 , wherein the etch stop layer has a portion surrounding the first conductor, and said portion of the etch stop layer has a top surface in a third position lower than the first position.

11. The interconnection structure of claim 10 , further comprising:
a barrier layer contacting said portion of the etch stop layer.

12. The interconnection structure of claim 8 , further comprising:
a third conductor at least partially in the first dielectric layer, wherein the etch stop layer covers the third conductor.

13. The interconnection structure of claim 12 , wherein the third conductor has a portion protruding from the first dielectric layer.

14. The interconnection structure of claim 13 , wherein the etch stop layer has a raised portion conformally over the protruding portion of the third conductor.

15. The interconnection structure of claim 8 , wherein the etch stop layer has a raised portion covering a protruding portion of the first conductor and the raised portion has a cap part over a top surface of the protruding portion of the first conductor and a spacer part over a sidewall of the protruding portion of the first conductor and thicker than the cap part.

16. A method for manufacturing an interconnection structure, the method comprising:
etching a first hole in a first dielectric layer;
depositing a first conductor in the first hole;
etching back the first dielectric layer, such that the first conductor has a portion protruding from the first dielectric layer;
conformally depositing an etch stop layer on the first dielectric layer and the protruding portion of the first conductor;
depositing a second dielectric layer on the etch stop layer;
etching a second hole in the second dielectric layer and the etch stop layer to expose the first conductor and to form a recess surrounding the first conductor; and
depositing a barrier layer to line the recess.

17. The method of claim 16 , further comprising:
etching a second hole in the first dielectric layer;
depositing a second conductor in the second hole in the first dielectric layer, wherein conformally depositing the etch stop layer comprises conformally depositing a portion of the etch stop layer over the second conductor;
etching a third hole in the second dielectric layer and the etch stop layer to expose the second conductor, wherein the protruding portion of the first conductor is covered by the etch stop layer after etching the third hole; and
depositing a third conductor in the third hole.

18. The method of claim 17 , wherein etching the third hole is performed such that the third hole tapers toward the second conductor.

19. The method of claim 16 , wherein conformally depositing the etch stop layer is performed such that the etch stop layer has a raised portion covering the protruding portion of the first conductor.

20. The method of claim 16 , further comprising depositing a second conductor in the second hole.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Zheng Zhi-Sheng
• Wang Chih-Lin

Classifications

• H10W20/063

  by forming conductive members before forming protective insulating material · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/081 Primary

  by forming openings in the dielectric parts · CPC title

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title

• H10W20/056 Primary

  by filling conductive material into holes, grooves or trenches · CPC title