Voltage regulator and method for compensating the effects of an output impedance

Patent metadata

Field	Value
Publication number	US-10503188-B2
Application number	US-201816223174-A
Country	US
Kind code	B2
Filing date	Dec 18, 2018
Priority date	Dec 18, 2017
Publication date	Dec 10, 2019
Grant date	Dec 10, 2019

Abstract

A voltage regulator is presented. The output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance. The voltage regulator has an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator. The voltage regulator has an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage. A differential amplification stage determines the differential output voltage in dependence of the output voltage and in dependence of a reference voltage. The voltage regulator has a sensing unit to provide a load indication which is indicative of the output current and a variable impedance coupled to the intermediate node, where the variable impedance is dependent on the load indication.

First claim

What is claimed is:

1. A voltage regulator configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator; wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance; wherein the voltage regulator comprises,
an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage wherein the intermediate amplification stage exhibits an amplification bandwidth;
a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
a sensing unit configured to provide a load indication which is indicative of the output current; and
a variable impedance coupled to the intermediate node; wherein the variable impedance is dependent on the load indication, wherein the variable impedance is such that
the amplification bandwidth is reduced, if the load indication indicates a relatively high output current; and

the amplification bandwidth remains unaffected, if the load indication indicates a relatively low output current.

2. The voltage regulator of claim 1 , wherein the variable impedance is such that
a magnitude of the impedance is relatively low, if the load indication indicates a relatively high output current; and
the magnitude of the impedance is relatively high, if the load indication indicates a relatively low output current.

3. The voltage regulator of claim 1 , wherein
the output capacitor and the parasitic inductance form an LC circuit with an LC resonance frequency; and
a load current dependency and/or a magnitude of the variable impedance is set based on the LC resonance frequency.

4. The voltage regulator of claim 1 , wherein
the variable impedance comprises a capacitor which is arranged in series with a variable resistance;
the serial arrangement of the capacitor and the resistance is arranged to couple the intermediate node to a reference potential of the voltage regulator; and
the variable resistance is dependent on the load indication.

5. The voltage regulator of claim 4 , wherein the variable resistance is
relatively low, if the load indication indicates a relatively high output current; and
relatively high, if the load indication indicates a relatively low output current.

6. The voltage regulator of claim 4 , wherein
the variable resistance is at least partially provided by a control transistor having a variable on-resistance; and
the control transistor is controlled based on the load indication.

7. The voltage regulator of claim 1 , wherein
the output amplification stage comprises a drive transistor which forms a current mirror with a pass transistor;
the output current corresponds to a current through the pass transistor;
the output amplification stage comprises a first transistor which is arranged in series with the drive transistor and which forms a current mirror with a second transistor;
the output amplification stage comprises a third transistor which is controlled based on the drive voltage at the intermediate node and which is arranged in series with the second transistor; and
the load indication depends on, notably corresponds to, a voltage level of gates of the first and second transistors.

8. The voltage regulator of claim 7 referring back to claim 6 , wherein a gate of the control transistor is coupled to the gates of the first and second transistors.

9. The voltage regulator of claim 7 referring back to claim 6 , wherein
the sensing unit comprises a sensing transistor having a gate that is coupled to the gates of the first and second transistors and being arranged in series with a sensing resistor; and
a gate of the control transistor is coupled to a midpoint between the sensing transistor and the sensing resistor.

10. The voltage regulator of claim 1 , wherein
the voltage regulator comprises a feedback network configured to provide a feedback voltage which is dependent on the output voltage; and
the differential amplification stage is configured to determine the differential output voltage in dependence of the feedback voltage and in dependence of the reference voltage.

11. A method for compensating and/or reducing effects of a parasitic inductance at an output of a voltage regulator; wherein the voltage regulator is configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator; wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits the parasitic inductance; wherein the voltage regulator comprises an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator; wherein the voltage regulator comprises an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage, wherein the intermediate amplification stage exhibits an amplification bandwidth; and wherein the voltage regulator comprises a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage; wherein the method comprises
determining a load indication which is indicative of the output current; and
setting an impedance at the intermediate node based on the load indication such that:
i. the amplification bandwidth is reduced, if the load indication indicates a relatively high output current; and
the amplification bandwidth remains unaffected, if the load indication indicates a relatively low output current.

12. A voltage regulator configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator; wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance; wherein the voltage regulator comprises,
an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage, wherein the intermediate amplification stage exhibits a pole;
a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
a sensing unit configured to provide a load indication which is indicative of the output current; and
a variable impedance coupled to the intermediate node; wherein the variable impedance is dependent on the load indication, wherein the variable impedance is such that
a frequency of the pole is reduced, if the load indication indicates a relatively high output current; and
the frequency of the pole remains unaffected, if the load indication indicates a relatively low output current.

13. A voltage regulator configured to provide an output current at an output

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Ramos Carlos Zamarreno
• Kronmueller Frank
• Bhattad Ambreesh

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• G05F1/565

  sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title