Packet retransmission

US10498495B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10498495-B2
Application numberUS-201715678870-A
CountryUS
Kind codeB2
Filing dateAug 16, 2017
Priority dateApr 12, 2006
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of packet retransmission comprising: transmitting or receiving, using a transceiver, a plurality of packets, wherein at least one first packet of the plurality of packets is associated with a first delay requirement, wherein at least one second packet of the plurality of packets is associated with a second delay requirement, and wherein the second delay requirement is lower than the first delay requirement; identifying the at least one second packet of the plurality of packets as a packet that should not be retransmitted even when the packet is received in error; and transmitting or receiving, using the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet, wherein the ACK information is transmitted or received a plurality of times such that the ACK information is transmitted or received in a first DMT symbol and the ACK information is also transmitted or received in a second DMT symbol. 2. The method of claim 1 , further comprising passing the at least one second packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets. 3. The method of claim 1 , further comprising passing the at least one first packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets. 4. The method of claim 1 , further comprising waiting for the receipt of other retransmitted packets before passing the at least one first packet a higher layer when they are received without error. 5. A transceiver, including an interconnected processor and memory, operable to: receive, by the transceiver, a plurality of packets, wherein at least one first packet of the plurality of packets is associated with a first delay requirement, wherein at least one second packet of the plurality of packets is associated with a second delay requirement, and wherein the second delay requirement is lower than the first delay requirement; and pass the at least one second packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets; and further operable to transmit, by the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet, wherein the ACK information is transmitted a plurality of times such that the ACK information is transmitted in a first DMT symbol and the ACK information is also transmitted in a second DMT symbol. 6. The transceiver of claim 5 , further operable to pass the at least one first packet when it is received without error to the higher layer without waiting for receipt of other retransmitted packets. 7. The transceiver of claim 5 , further operable to wait for the receipt of other retransmitted packets before passing the at least one first packet to the higher layer when they are received without error. 8. A transceiver, including an interconnected processor and memory, operable to: receive, by the transceiver, a first packet type and a second packet type, wherein the first packet type is associated with a first delay requirement, wherein the second packet type is associated with a second delay requirement, wherein the second delay requirement is lower than the first delay requirement; and pass packets of the second packet type that are received without errors to a higher layer without waiting for receipt of other retransmitted packets, and further operable to transmit, by the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet, wherein the ACK information is transmitted a plurality of times such that the ACK information is transmitted in a first DMT symbol and the ACK information is also transmitted in a second DMT symbol. 9. The transceiver of claim 8 , further operable to pass packets of the first packet type that are received without errors to a higher layer without waiting for receipt of other retransmitted packets. 10. The transceiver of claim 8 , further operable to wait for receipt of other retransmitted packets before passing packets of the first packet type that are received without errors to a higher layer when they are received without error.

Assignees

Inventors

Classifications

  • Cell loss · CPC title

  • by discarding or delaying data units, e.g. packets or frames · CPC title

  • relying on flow classification, e.g. using integrated services [IntServ] · CPC title

  • Allocation of priorities to traffic types · CPC title

  • Transfer mode dependent, e.g. ATM · CPC title

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Frequently asked questions

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What does patent US10498495B2 cover?
Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packe…
Who is the assignee on this patent?
Tq Delta Llc
What technology area does this patent fall under?
Primary CPC classification H04L12/5601. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).