Resource sharing in a telecommunications environment

US9547608B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9547608-B2
Application numberUS-201615046821-A
CountryUS
Kind codeB2
Filing dateFeb 18, 2016
Priority dateOct 12, 2004
Publication dateJan 17, 2017
Grant dateJan 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.

First claim

Opening claim text (preview).

The invention claimed is: 1. A transceiver comprising: a transmitter portion operable to transmit a first message over a channel, wherein the first message indicates a first maximum number of bytes associated with an interleaver function of a transmit latency path and a first maximum number of bytes associated with a deinterleaver function of a receive latency path; and a receiver portion operable to determine a change in a channel condition for the channel; the transmitter portion further operable to transmit a second message over the channel after determining the change in the channel condition, wherein the second message indicates a second maximum number of bytes associated with the interleaver function of the transmit latency path and a second maximum number of bytes associated with the deinterleaver function of the receive latency path, wherein the first maximum number of bytes associated with the interleaver function of the transmit latency path is different than the second maximum number of bytes associated with the interleaver function of the transmit latency path, and wherein the first maximum number of bytes associated with the deinterleaver function of the receive latency path is different than the second maximum number of bytes associated with the deinterleaver function of the receive latency path. 2. The transceiver of claim 1 , further comprising a memory wherein the memory is operable to be shared between the interleaver function of the transmitter portion associated with the transmit latency path and the deinterleaver function of the receiver portion associated with the receive latency path, wherein the first maximum number of bytes associated with the interleaver function is used to determine how much memory is used by the interleaver function and wherein the first maximum number of bytes associated with the deinterleaver function is used to determine how much memory is used by the deinterleaver function, wherein the sharing comprises using a first portion of the memory for the interleaver function and simultaneously using a second portion of the memory, different than the first portion, for the deinterleaver function, and the first and second portions of the memory are configurable such that one or more bytes of the memory can be used by the interleaver function at one particular time and the same one or more bytes of the memory can be used by the deinterleaver function at a second time, different than the first time. 3. The transceiver of claim 2 , wherein the second maximum number of bytes associated with the interleaver function of the transmit latency path is used to determine how much memory is used by the interleaver function, and wherein the second maximum number of bytes associated with the deinterleaver function of the receive latency path is used to determine how much memory used by the deinterleaver function. 4. A transceiver comprising: a transmitter portion operable to transmit a first message over a channel at a first time, wherein the first message indicates a first maximum number of bytes associated with an interleaver function of a transmit latency path and a first maximum number of bytes associated with a deinterleaver function of a receive latency path; and a receiver portion operable to determine a change in a channel condition of the channel, wherein the transmitter portion is further operable to transmit a second message over the channel at a second time after determining the change in the channel condition, wherein the second message indicates a second maximum number of bytes associated with the interleaver function of the transmit latency path and a second maximum number of bytes associated with the deinterleaver function of the receive latency path, wherein the first maximum number of bytes associated with the interleaver function of the transmit latency path is different than the second maximum number of bytes associated with the interleaver function of the transmit latency path, wherein the first maximum number of bytes associated with the deinterleaver function of the receive latency path is different than the second maximum number of bytes associated with the deinterleaver function of the receive latency path, wherein the first time is different than the second time, and wherein one or more bytes of memory is used by the interleaver function of the transmitter portion at the first time and the same one or more bytes of the memory are used by the deinterleaver function of the receiver portion at the second time. 5. In a transceiver, a method comprising: transmitting, by a transmitter portion over a channel, a first message, wherein the first message indicates a first maximum number of bytes associated with an interleaver function of a transmit latency path and a first maximum number of bytes associated with a deinterleaver function of a receive latency path; determining a change in a channel condition of the channel; and transmitting a second message, by the transmitter portion over the channel, after determining the change in the channel condition, wherein the second message indicates a second maximum number of bytes associated with the interleaver function of the transmit latency path and a second maximum number of bytes associated with the deinterleaver function of the receive latency path; wherein the first maximum number of bytes associated with the interleaver function of the transmit latency path is different than the second maximum number of bytes associated with the interleaver function of the transmit latency path, and wherein the first maximum number of bytes associated with the deinterleaver function of the receive latency path is different than the second maximum number of bytes associated with the deinterleaver function of the receive latency path. 6. The transceiver of claim 5 , further comprising sharing a memory between the interleaver of the transmitter portion function associated with the transmit latency path and the deinterleaver function of the receiver portion associated with the receive latency path, wherein the first maximum number of bytes associated with the interleaver function is used to determine how much memory is used by the interleaver function and wherein the first maximum number of bytes associated with the deinterleaver function is used to determine how much memory is used by the deinterleaver function wherein the sharing comprises using a first portion of the memory for the interleaver function and simultaneously using a second portion of the memory, different than the first portion, for the deinterleaver function, and the first and second portions of the memory are configurable such that one or more bytes of the memory can be used by the interleaver function at one particular time and the same one or more bytes of the memory can be used by the deinterleaver function at a second time, different than the first time. 7. The transceiver of claim 6 , wherein the second maximum number of bytes associated with the interleaver function of the transmit latency path is used to determine how much memory is used by the interleaver function, and wherein the second maximum number of bytes associated with the deinterleaver function of the receive latency path is used to determine how much memory used by the deinterleaver function. 8. In a transceiver, a method comprising: transmitting, by a transmitter portion over a channel, a first message at a first time, wherein the first message indicates a first maximum number of bytes associated with an interleaver function of a transmit latency path and a first maximum number of bytes associated with a deinterleaver function of a receive latency path; determining a change in a channel condition of the channel; and transmitting, by the tr

Assignees

Inventors

Classifications

  • Single storage device · CPC title

  • Multicarrier modulation systems · CPC title

  • using storage descriptor, e.g. read or write pointers · CPC title

  • Use of interleaving (interleaving per se H03M13/27) · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

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Frequently asked questions

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What does patent US9547608B2 cover?
A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BE…
Who is the assignee on this patent?
Tq Delta Llc
What technology area does this patent fall under?
Primary CPC classification G06F13/1647. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).