Semiconductor device including multiple semiconductor chips

US10497675B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10497675-B2
Application numberUS-201615331801-A
CountryUS
Kind codeB2
Filing dateOct 21, 2016
Priority dateDec 3, 2015
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

There is provided a semiconductor device, enhanced with process capability and reliability by way of flow control of an adhesive material to fix semiconductor chips. The semiconductor device includes a first semiconductor chip including a first surface and a second surface opposite to each other, a flow regulating structure formed at the first surface of the first semiconductor chip, and a second semiconductor chip mounted on the first surface of the first semiconductor chip. The second semiconductor chip overlaps at least a portion of the flow regulating structure.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a first semiconductor chip including a first surface and a second surface opposite to each other; a first uneven pattern formed at the first surface of the first semiconductor chip; and a second semiconductor chip mounted on the first surface of the first semiconductor chip, wherein the second semiconductor chip overlaps at least a portion of the first uneven pattern in a vertical direction, the first surface of the first semiconductor chip includes a first corner and a second corner, the first uneven pattern includes a trench structure formed within the first semiconductor chip, the trench structure includes a first radial trench, and the first radial trench is formed radially in the first surface of the first semiconductor chip, the first radial trench extending toward the first corner, and wherein the first uneven pattern includes a protruding structure protruding from the first surface of the first semiconductor chip and protruding away from the second surface of the first semiconductor chip. 2. The semiconductor device of claim 1 , wherein the first surface of the first semiconductor chip further includes a side connecting the first corner and the second corner, the trench structure further includes a second radial trench and a parallel trench, the second radial trench is formed radially in the first surface of the first semiconductor chip, the second radial trench extending toward the second corner, and the parallel trench extends between the first and second radial trenches, along the side of the first surface of the first semiconductor chip. 3. The semiconductor device of claim 2 , wherein the first and second radial trenches and the parallel trench are connected with each other. 4. The semiconductor device of claim 2 , wherein the parallel trench includes a long sidewall and a short sidewall, and the long sidewall of the parallel trench extends along the side of the first surface of the first semiconductor chip. 5. The semiconductor device of claim 2 , wherein each of the first and second radial trench extends from a center region of the first surface of the first semiconductor chip toward the first and second corners of the first surface of the first semiconductor chip, and a distance between the first and second radial trench increases as a distance from the first and second corners increases. 6. The semiconductor device of claim 1 , wherein the first surface of the first semiconductor chip includes a first side and a second side that are connected, the trench structure includes a first trench formed along the first side, and a second trench formed along the second side, each of the first trench and the second trench includes a long sidewall and a short sidewall, and the long sidewall of the first trench extends along the first side, and the long sidewall of the second trench extends along the second side. 7. The semiconductor device of claim 1 , wherein the first surface of the first semiconductor chip includes a first side connected to a second side, the protruding structure includes a first protruding pattern extending along the first side, and a second protruding pattern extending along the second side, each of the first protruding pattern and the second protruding pattern includes a long sidewall and a short sidewall, and the long sidewall of the first protruding pattern extends along the first side, and the long sidewall of the second protruding pattern extends along the second side. 8. The semiconductor device of claim 7 , wherein the first protruding pattern and the second protruding pattern are not connected with each other. 9. The semiconductor device of claim 1 , wherein the first semiconductor chip comprises a through-silicon via (TSV). 10. The semiconductor device of claim 1 , further comprising a second radial trench is formed radially in the first surface of the first semiconductor chip, wherein the second radial trench extending toward a second corner of the first surface of the first semiconductor chip, and the first radial trench and the second radial trench are separated from each other. 11. A semiconductor device, comprising: a first semiconductor chip including a through-silicon via; a connection terminal attached to a second surface opposite a first surface of the first semiconductor chip; a second semiconductor chip mounted on the first surface of the first semiconductor chip; a fixing film formed on the first surface of the first semiconductor chip and extending between the first semiconductor chip and the second semiconductor chip; and a first radial trench and a second radial trench formed in the first surface of the first semiconductor chip, the first radial trench and the second radial trench extending from a center region of the first surface of the first semiconductor chip toward a first corner and a second corner of the first surface of the first semiconductor chip, respectively, wherein the first radial trench and the second radial trench are separated from each other at the center region of the first surface. 12. The semiconductor device of claim 11 , wherein the second semiconductor chip overlaps at least a portion of the first and second radial trenches in a vertical direction. 13. The semiconductor device of claim 11 , wherein the first surface of the first semiconductor chip includes a first side and a second side that are connected, the semiconductor device further comprises a first parallel trench formed along the first side, and a second parallel trench formed along the second side, each of the first parallel trench and the second parallel trench includes a long sidewall and a short sidewall, and the long sidewall of the first parallel trench extends along the first side, and the long sidewall of the second parallel trench extends along the second side. 14. The semiconductor device of claim 11 , wherein the first surface of the first semiconductor chip includes a first side and a second side that are connected, the semiconductor device further comprises a first protruding pattern extending along the first side, and a second protruding pattern extending along the second side, each of the first protruding pattern and the second protruding pattern includes a long sidewall and a short sidewall, the long sidewall of the first protruding pattern extends along the first side, and the long sidewall of the second protruding pattern extends along the second side, and the first protruding pattern and the second protruding pattern each protrudes from the first surface of the first semiconductor chip and protrudes away from the second surface of the first semiconductor chip.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

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Frequently asked questions

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What does patent US10497675B2 cover?
There is provided a semiconductor device, enhanced with process capability and reliability by way of flow control of an adhesive material to fix semiconductor chips. The semiconductor device includes a first semiconductor chip including a first surface and a second surface opposite to each other, a flow regulating structure formed at the first surface of the first semiconductor chip, and a seco…
Who is the assignee on this patent?
Kwak Byoung Soo, Min Tae Hong, Lee In Young, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).