Microelectronic conductive routes and methods of making the same

Patent metadata

Field	Value
Publication number	US-10497613-B2
Application number	US-201515560245-A
Country	US
Kind code	B2
Filing date	Apr 29, 2015
Priority date	Apr 29, 2015
Publication date	Dec 3, 2019
Grant date	Dec 3, 2019

Abstract

A conductive route structure may be formed comprising a conductive trace and a conductive via, wherein the conductive via directly contacts the conductive trace. In one embodiment, the conductive route structure may be formed by forming a dielectric material layer on the conductive trace. A via opening may be formed through the dielectric material layer to expose a portion of the conductive trace and a blocking layer may be from only on the exposed portion of the conductive trace. A barrier line may be formed on sidewalls of the via opening and the blocking layer may thereafter be removed. A conductive via may then be formed within the via opening, wherein the conductive via directly contacts the conductive trace.

First claim

What is claimed is:

1. A method of forming a conductive route structure, comprising:
forming a conductive trace;
forming a dielectric material layer on the conductive trace;
forming a via opening defined by sidewalls extending through the dielectric material layer to expose a portion of the conductive trace;
forming a blocking layer from octadecylphosphic acid only on the exposed portion of the conductive trace;
forming a barrier liner on the via opening sidewalls, wherein the barrier liner contacts the blocking layer without contacting the conductive trace;
removing the blocking layer after forming the barrier liner; and
forming a conductive via in the via opening, wherein the conductive via directly contacts the conductive trace.

2. The method of claim 1 , further including forming a barrier material layer between the conductive trace and the dielectric material layer, wherein the via opening extends through the dielectric material layer and the barrier material layer.

3. The method of claim 1 , wherein forming the blocking layer comprises forming a self-assembled monolayer.

4. The method of claim 1 , wherein forming the barrier liner comprises forming the barrier liner from a high-K material.

5. The method of claim 1 , wherein forming the barrier liner comprises forming the barrier liner from a metal oxide.

6. The method of claim 5 , wherein forming the barrier liner from a metal oxide comprises forming a hafnium oxide barrier liner.

7. The method of claim 5 , wherein forming the barrier liner from a metal oxide comprises forming a zirconium oxide barrier liner.

8. A method of forming a conductive route structure, comprising:
forming a conductive trace;
forming a dielectric material layer on the conductive trace;
forming a via opening defined by sidewalls extending through the dielectric material layer to expose a portion of the conductive trace;
forming a blocking layer from octadecylphosphic acid only on the exposed portion of the conductive trace;
forming a barrier liner on the via opening sidewalls;
removing the blocking layer after forming the barrier liner; and
forming a conductive via in the via opening, wherein the conductive via directly contacts the conductive trace.

9. The method of claim 8 , wherein forming the barrier liner comprises forming the barrier liner from a high-K material.

10. The method of claim 8 , further including forming a barrier material layer between the conductive trace and the dielectric material layer, wherein the via opening extends through the dielectric material layer and the barrier material layer.

11. The method of claim 8 , wherein forming the blocking layer comprises forming a self-assembled monolayer.

12. The method of claim 8 , wherein forming the barrier liner comprises forming the barrier liner from a metal oxide.

13. The method of claim 12 , wherein forming the barrier liner from a metal oxide comprises forming a hafnium oxide barrier liner.

14. The method of claim 12 , wherein forming the barrier liner from a metal oxide comprises forming a zirconium oxide barrier liner.

Assignees

• Intel Corp

Inventors

• Chawla Jasmeet S
• Hourani Rami
• Kobrinsky Mauro J
• Gstrein Florian
• Clendenning Scott B
• Roberts Jeanette M

Classifications

• H10W20/0765

  the thin functional dielectric layers being temporary, e.g. sacrificial layers · CPC title

• H10W20/092

  by smoothing the dielectric parts · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/076 Primary

  in via holes or trenches · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title