Semiconductor device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10490638-B2
Application number	US-201815878143-A
Country	US
Kind code	B2
Filing date	Jan 23, 2018
Priority date	Jan 24, 2017
Publication date	Nov 26, 2019
Grant date	Nov 26, 2019

Abstract

A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate;
a surface electrode covering a surface of the semiconductor substrate;
an insulating protection film covering a part of a surface of the surface electrode; and
a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein
the surface electrode comprises:
a first metal film provided on the semiconductor substrate;
a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and
a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film;
wherein the third metal film comprises a main metal layer and metal particles dispersed in the main metal layer.

2. The semiconductor device of claim 1 , wherein resistivity of the metal particles is lower than resistivity of the main metal layer.

3. A semiconductor device, comprising:
a semiconductor substrate;
a surface electrode covering a surface of the semiconductor substrate;
an insulating protection film covering a part of a surface of the surface electrode; and
a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein
the surface electrode comprises:
a first metal film provided on the semiconductor substrate;
a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and
a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film;

wherein:
the surface electrode covers an upper surface of the semiconductor substrate;
the insulating protection film includes a lower surface covering a first part of an upper surface of the surface electrode; and
the solder-bonding metal film covers a range spreading from an upper surface of the insulating protection film to a second part of the upper surface of the surface electrode.

4. The semiconductor device of claim 3 , wherein a crystal grain size of the third metal film is smaller than a crystal grain size of the first metal film.

5. The semiconductor device of claim 3 , wherein the third metal film comprises a main metal layer and metal particles dispersed in the main metal layer.

6. The semiconductor device of claim 5 , wherein resistivity of the metal particles is lower than resistivity of the main metal layer.

7. The semiconductor device of claim 3 , wherein
the surface electrode, the insulating protection film, and the solder-bonding metal film are in contact with each other and constitute a triple contact portion, and
in a plan view of the upper surface of the semiconductor substrate, a laminated structure of the first metal film, the second metal film, and the third metal film is provided at a part of the surface electrode so as to overlap with the triple contact portion.

8. The semiconductor device of claim 7 , wherein in the plan view of the upper surface of the semiconductor substrate, the laminated structure is provided only within a range of 30 μm from the triple contact portion.

9. The semiconductor device of claim 3 , wherein a plurality of trenches are provided on the upper surface of the semiconductor substrate.

10. The semiconductor device of claim 9 , wherein each trench is provided with a gate electrode and a gate insulating film.

11. The semiconductor device of claim 10 , wherein an upper surface of each gate electrode is covered by an interlayer insulating film.

12. The semiconductor device of claim 11 , wherein the semiconductor substrate includes a plurality of N-type emitter regions, p-type body contact regions, p-type body regions, n-type drift regions, and p-type collector regions.

Assignees

• Toyota Motor Co Ltd
• Denso Corp

Inventors

• Kuno Takashi
• Tsuma Hiroki
• Kuwano Satoshi
• Soeno Akitaka
• Kanemaru Toshitaka
• Hashimoto Kenta
• Kakimoto Noriyuki
• Yoneda Shuji

Classifications

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title

• H10W72/90

  Bond pads, in general · CPC title

• H10W72/925

  Bond pads having a filler embedded in a matrix · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/921

  Structures or relative sizes of bond pads · CPC title