Intelligent power modules for resonant converters

US10476494B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10476494-B2
Application numberUS-201715464136-A
CountryUS
Kind codeB2
Filing dateMar 20, 2017
Priority dateMar 20, 2017
Publication dateNov 12, 2019
Grant dateNov 12, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An intelligent power module includes a power switch, a freewheeling device, and a controller circuit incorporating a gate drive circuit and one or more power switch protection circuits. In one embodiment, the power switch is an insulated gate bipolar transistor (IGBT) device, the freewheeling device is a PN junction diode, and the controller circuit is implemented as a semiconductor integrated circuit (IC). The power module implements protection functions for the power switching device where the protection circuits are formed on the controller circuit IC and co-packaged with the power switch. In some embodiments, the control circuit in the power module includes an active soft-start circuit which is activated to realize soft-start of the power switch. In other embodiments, the control circuit in the power module includes an active turn-on pulse control circuit to detect for abnormal system input signal pulse events and block system undesired input pulses.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor package, comprising: a power switch being a discrete device and having a control terminal and first and second power terminals; a freewheeling device being a discrete device, the freewheeling device being connected electrically in parallel to the first and second power terminals of the power switch; and a controller circuit being a monolithic integrated circuit, the controller circuit having a first output terminal connected to the control terminal of the power switch, a first input terminal receiving an input signal and a second input terminal receiving a feedback signal, the input signal determining an on-period and off-period of the power switch, the controller circuit comprising a normal gate drive circuit for generating a gate drive signal to drive the control terminal of the power switch in response to the input signal and a protection circuit implementing at least one protection function for the power switch, wherein the semiconductor package comprises a first terminal being the first power terminal of the power switch, a second terminal being the second power terminal of the power switch, a third terminal coupled to the first input terminal of the controller circuit, and a fourth terminal coupled to the second input terminal of the controller circuit; and wherein the protection circuit in the controller circuit comprises a soft-start protection circuit comprising a soft-start gate drive circuit and a soft-start control circuit, the soft-start control circuit being configured to detect a first system input signal pulse following power up of the controller circuit, or following an idle period of the system input signal, or following removal of a fault condition, the soft-start control circuit being configured to turn on the soft-start gate drive circuit to in response to detecting the first system input signal pulse, the soft-start gate drive circuit being configured to drive the power switch with a slowly rising voltage to softly turn on the power switch. 2. The semiconductor package of claim 1 , wherein the semiconductor package further comprises a fifth terminal receiving a positive power supply voltage and a sixth terminal receiving a ground voltage, the fifth terminal being coupled to a power supply terminal of the controller circuit and the sixth terminal being coupled to a ground terminal of the controller circuit. 3. The semiconductor package of claim 2 , wherein the protection circuit detects an operating condition of the power switch and generates a fault indicator signal in response to a fault condition being detected, and the controller circuit is configured to block the system input signal from driving the power switch through the normal gate drive circuit in response to the fault indicator signal being asserted. 4. The semiconductor package of claim 3 , wherein the fault condition comprises one of an under-voltage of the positive power supply voltage, an over-voltage of the positive power supply voltage, and an over-temperature condition. 5. The semiconductor package of claim 1 , wherein the semiconductor package comprises a transistor outline package. 6. The semiconductor package of claim 1 , wherein the protection circuit in the controller circuit further comprises an over-voltage protection circuit, the over-voltage protection circuit comprising a protection gate drive circuit and an over-voltage control circuit, the over-voltage control circuit being configured to detect an over-voltage condition across the power switch during an off-period of the power switch and to turn on the protection gate drive circuit during the off-period to drive the power switch with a clamped voltage to turn on the power switch to dissipate the over-voltage. 7. The semiconductor package of claim 1 , wherein the protection circuit in the controller circuit further comprises a maximum duty cycle disable circuit configured to monitor a duration of the on period of the system input signal, and to turn off the power switch in response to the duration of the on period exceeding a maximum on duration. 8. The semiconductor package of claim 1 , wherein the protection circuit in the controller circuit further comprises an abnormal turn on disable circuit configured to monitor a deassertion transition of the system input signal, and to block the system input signal from driving the power switch through the normal gate drive circuit for a minimum off duration. 9. The semiconductor package of claim 1 , wherein the controller circuit further comprises a temperature monitoring circuit configured to generate an over-temperature signal, the over-temperature being coupled to a fifth terminal of the semiconductor package as an output signal. 10. The semiconductor package of claim 1 , wherein the power switch comprises an insulated gate bipolar transistor (IGBT) device and the freewheeling device comprises a PN junction diode. 11. A semiconductor package, comprising: a power switch being a discrete device and having a control terminal and first and second power terminals; a freewheeling device being a discrete device, the freewheeling device being connected electrically in parallel to the first and second power terminals of the power switch; and a controller circuit being a monolithic integrated circuit, the controller circuit having a first output terminal connected to the control terminal of the power switch, a first input terminal receiving an input signal and a second input terminal receiving a feedback signal, the input signal determining an on-period and off-period of the power switch, the controller circuit comprising a normal gate drive circuit for generating a gate drive signal to drive the control terminal of the power switch in response to the input signal and a protection circuit implementing at least one protection function for the power switch, wherein the semiconductor package comprises a first terminal being the first power terminal of the power switch, a second terminal being the second power terminal of the power switch, a third terminal coupled to the first input terminal of the controller circuit, and a fourth terminal coupled to the second input terminal of the controller circuit; and wherein the protection circuit in the controller circuit comprises an abnormal turn on disable circuit configured to monitor a deassertion transition of the system input signal, and to block the system input signal from driving the power switch through the normal gate drive circuit for a minimum off duration. 12. The semiconductor package of claim 11 , wherein the semiconductor package further comprises a fifth terminal receiving a positive power supply voltage and a sixth terminal receiving a ground voltage, the fifth terminal being coupled to a power supply terminal of the controller circuit and the sixth terminal being coupled to a ground terminal of the controller circuit. 13. The semiconductor package of claim 11 , wherein the semiconductor package comprises a transistor outline package. 14. The semiconductor package of claim 11 , wherein the protection circuit in the controller circuit further comprises a soft-start protection circuit comprising a soft-start gate drive circuit and a soft-start control circuit, the soft-start control circuit being configured to detect a first system input signal pulse following power up of the controller circuit, or following an idle period of the system input signal, or following removal of a fault condition, the soft-start control circuit being configured to turn on the soft-start gate drive circuit to in response to detecting the first system input signal pulse, the soft-start gate dr

Assignees

Inventors

Classifications

  • multiple bond wires connected to common bond pads at both ends of the wires · CPC title

  • multiple bond wires connected to a common bond pad · CPC title

  • Multiple bond wires having different sizes · CPC title

  • changes in structures or sizes · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

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Frequently asked questions

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What does patent US10476494B2 cover?
An intelligent power module includes a power switch, a freewheeling device, and a controller circuit incorporating a gate drive circuit and one or more power switch protection circuits. In one embodiment, the power switch is an insulated gate bipolar transistor (IGBT) device, the freewheeling device is a PN junction diode, and the controller circuit is implemented as a semiconductor integrated …
Who is the assignee on this patent?
Alpha & Omega Semiconductor Cayman Ltd
What technology area does this patent fall under?
Primary CPC classification H03K17/0828. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 12 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).