Semiconductor device with contact plug

Patent metadata

Field	Value
Publication number	US-10475699-B2
Application number	US-201815888999-A
Country	US
Kind code	B2
Filing date	Feb 5, 2018
Priority date	Sep 4, 2014
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate with a first portion and a second portion adjacent to the first portion;
an epi-layer disposed in the first portion;
a first etch stop layer disposed on the second portion;
an interlayer dielectric (ILD) layer disposed on the first etch stop layer;
a second etch stop layer disposed on the ILD layer, wherein the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion;
a protective layer disposed on the sidewall, wherein the protective layer is formed from oxide or nitride;
a liner disposed on the protective layer that enhances an adhesive effect between the sidewall and the liner, wherein the protective layer and the liner are formed from different materials;
a silicide cap disposed on the epi-layer; and
a contact plug disposed on the silicide cap and surrounded by the liner.

2. The semiconductor device of claim 1 , wherein the epi-layer is formed from silicon or silicon-germanium.

3. The semiconductor device of claim 1 , wherein the epi-layer is a source/drain region.

4. The semiconductor device of claim 1 , further comprising a metal gate on the second portion of the substrate.

5. The semiconductor device of claim 1 , wherein the protective layer is formed from silicon oxide or silicon nitride.

6. The semiconductor device of claim 1 , wherein the liner is formed from silicon nitride, silicon oxy-nitride, silicon carbide or silicon oxy-carbide.

7. The semiconductor device of claim 1 , wherein the silicide cap is formed from titanium silicide, nickel silicide, cobalt silicide, platinum silicide, palladium silicide, tungsten silicide, tantalum silicide or erbium silicide.

8. The semiconductor device of claim 1 , wherein the contact plug is formed from aluminum (Al), tungsten (W), or copper (Cu).

9. The semiconductor device of claim 1 , further comprising an inter-metal dielectric layer disposed on the second etch stop layer.

10. A semiconductor device, comprising:
a substrate with a first portion and two second portions sandwiching the first portion;
an epi-layer disposed in the first portion;
a silicide cap disposed on the epi-layer;
a contact plug disposed on the silicide cap;
a first etch stop layer disposed on the second portions and extending to the first portion;
an interlayer dielectric (ILD) layer disposed on the first etch stop layer and extending to the first portion;
a second etch stop layer disposed on the ILD layer and extending to the first portion, wherein the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall;
a protective layer peripherally enclosed by the sidewall, wherein the protective layer is formed from oxide or nitride; and
a liner peripherally enclosed by the protective layer that enhances an adhesive effect between the sidewall and the liner, wherein the protective layer and the liner are formed from different materials.

11. The semiconductor device of claim 10 , wherein the epi-layer is a source/drain region.

12. The semiconductor device of claim 10 , further comprising:
a metal gate on one of the second portions of the substrate; and
an isolation feature disposed in the other one of the second portions of the substrate.

13. The semiconductor device of claim 10 , wherein the protective layer is formed from silicon oxide or silicon nitride.

14. The semiconductor device of claim 10 , wherein the liner is formed from silicon nitride, silicon oxy-nitride, silicon carbide or silicon oxy-carbide.

15. The semiconductor device of claim 10 , further comprising an inter-metal dielectric layer disposed on the second etch stop layer.

16. A semiconductor device, comprising:
a substrate with two first portions and one second portion sandwiched by the first portions;
an epi-layer disposed in each of the first portions;
a silicide cap disposed on the epi-layer;
a contact plug disposed on the silicide cap;
a first etch stop layer disposed on the second portion and extending to the first portions;
an interlayer dielectric (ILD) layer disposed on the first etch stop layer and extending to the first portions;
a second etch stop layer disposed on the ILD layer and extending to the first portions, wherein the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall on each of the first portions of the substrate;
a protective layer peripherally enclosed by the sidewall, wherein the protective layer is formed from oxide or nitride; and
a liner peripherally enclosed by the protective layer that enhances an adhesive effect between the sidewall and the liner, wherein the protective layer and the liner are formed from different materials.

17. The semiconductor device of claim 16 , wherein the epi-layer is a source/drain region.

18. The semiconductor device of claim 16 , further comprising a metal gate on the second portion of the substrate.

19. The semiconductor device of claim 16 , wherein the protective layer is formed from silicon oxide or silicon nitride.

20. The semiconductor device of claim 16 , wherein the liner is formed from silicon nitride, silicon oxy-nitride, silicon carbide or silicon oxy-carbide.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Hsieh Wen-Jia
• Hong Long-Jie
• Wang Chih-Lin
• Kuo Kang-Min

Classifications

• H10P70/234

  the processing being the formation of vias or contact holes · CPC title

• H10P50/282

  of inorganic materials · CPC title

• H10D64/0112

  using conductive layers comprising silicides · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title