Array substrate, display device and manufacturing method for the array substrate

Patent metadata

Field	Value
Publication number	US-10466552-B2
Application number	US-201715564661-A
Country	US
Kind code	B2
Filing date	May 19, 2017
Priority date	May 25, 2016
Publication date	Nov 5, 2019
Grant date	Nov 5, 2019

Abstract

An array substrate, a display device, and a method for manufacturing the array substrate are disclosed. The array substrate includes a base substrate and a pixel array structure disposed on the base substrate, the pixel array structure includes at least one light shielding layer made of a light shielding material, and the light shielding material can prevent light leakage or light reflection, thereby increasing an opening ratio of the display device.

First claim

The invention claimed is:

1. An array substrate, comprising a base substrate and a pixel array substrate disposed on the base substrate, wherein the pixel array substrate comprises at least one light shielding layer made of light shielding material,
wherein the pixel array substrate further comprises a pattern of source/drain metal layer, the pattern of source/drain metal layer comprises a source electrode and a drain electrode of the thin film transistor and a data line and the light shielding material is disposed on both surfaces of the pattern of source/drain metal layer away from the base substrate and adjacent to the base substrate so as to provide light shielding layers; and
wherein a pattern of the light shielding material corresponds to the/drain metal layer in a thickness direction of the base substrate.

2. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a thin film transistor, the thin film transistor comprises a pattern of active layer, and the light shielding layer is disposed at least corresponding to the pattern of active layer.

3. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a common electrode, and the light shielding material is disposed on a surface of the common electrode away from the base substrate so as to provide the light shielding layer.

4. The array substrate according to claim 3 , wherein the pixel array substrate further comprises a planarization layer and a pixel electrode insulated from the common electrode,
wherein the pixel electrode is connected to the drain electrode through a first through hole passing through the common electrode and the planarization layer.

5. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a pixel electrode, and the light shielding material is provided on a surface of the pixel electrode away from the base substrate so as to provide the light shielding layer.

6. The array substrate according to claim 5 , wherein the pixel array substrate further comprises a planarization layer between the pattern of source/drain electrode layer and the pixel electrode, and the pixel electrode is connected to the drain electrode through a through hole passing through the planarization layer.

7. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a planarization layer, and the light shielding material is provided on a surface of the planarization layer away from the base substrate so as to provide the light shielding layer.

8. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a pattern of gate metal layer, and the light shielding material is provided on a surface of the pattern of gate metal layer away from the base substrate so as to provide the light shielding layer.

9. The array substrate according to claim 8 , wherein the light shielding material is provided on a surface of the pattern of gate metal layer adjacent to the base substrate so as to provide the light shielding layer.

10. The array substrate according to claim 8 , wherein the pattern of gate metal layer comprises a gate electrode of the thin film transistor, a gate line and a common electrode line.

11. The array substrate according to claim 1 , wherein the pixel array substrate further comprises a gate line, a data line, a pixel electrode and a common electrode, the pixel electrode and the common electrode are insulated from each other and disposed on the same level or on different levels, and the common electrode and/or the pixel electrode covers the gate line and/or the data line.

12. The array substrate according to claim 1 , wherein the light shielding material is molybdenum oxide.

13. The array substrate according to claim 1 , wherein the pixel array structure further comprises a color filter layer which comprises a plurality of color filter units.

14. A display device, comprising the array substrate according to claim 1 .

15. A method for manufacturing an array substrate, comprising:
providing a base substrate; and
forming a pixel array structure on the base substrate;
wherein the pixel array structure comprises at least one light shielding layer made of light shielding material;
wherein the pixel array substrate further comprises a pattern of source/drain metal layer, the pattern of source/drain metal layer comprises a source electrode and a drain electrode of the thin film transistor and a data line, and the light shielding material is disposed on, both surfaces of the pattern of source/drain metal layer away from the base substrate and adjacent to the base substrate, so as to provide light shielding layers; and
wherein a pattern of the light shielding material corresponds to the pattern of source/drain metal layer in a thickness direction of the base substrate.

16. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a thin film transistor, the thin film transistor comprises a pattern of active layer, wherein the light shielding layer is disposed at least corresponding to the pattern of active layer.

17. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a common electrode, and the light shielding material is provided on a surface of the common electrode away from the base substrate so as to provide the light shielding layer.

18. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a pixel electrode, and the light shielding material is provided on a surface of the pixel electrode away from the base substrate so as to provide the light shielding layer.

19. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a planarization layer, and the light shielding material is provided on a surface of the planarization layer away from the base substrate so as to provide the light shielding layer.

20. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a pattern of gate metal layer, and the light shielding material is provided on a surface of the pattern of gate metal layer away from the base substrate so as to provide the light shielding layer.

21. The method for manufacturing an array substrate according to claim 15 , wherein the light shielding material is molybdenum oxide.

22. The method for manufacturing an array substrate according to claim 15 , wherein the pixel array structure further comprises a color filter layer, which comprises a plurality of color filter units.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Wang Shoukun
• Guo Huibin
• Feng Yuchun
• Li Liangliang
• Liu Zheng

Classifications

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/136209 Primary

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F2201/121

  common or background · CPC title

• G02F1/136227

  Through-hole connection of the pixel electrode to the active element through an insulation layer · CPC title