Non-volatile storage system with integrated compute engine and optimized use of local fast memory

Patent metadata

Field	Value
Publication number	US-10459644-B2
Application number	US-201715726903-A
Country	US
Kind code	B2
Filing date	Oct 6, 2017
Priority date	Oct 28, 2016
Publication date	Oct 29, 2019
Grant date	Oct 29, 2019

Abstract

A memory system (e.g. a solid state drive) includes one or more non-volatile memory die, a controller in communication with the memory die, a local memory connected to (or part of) the controller and a compute engine inside the memory system that is near the location of the data and can be used to perform common data manipulation operations. When the memory system receives instructions to use the compute engine to perform data manipulation operations, the local memory is reallocated such that an amount of space allocated in the local memory for logical to physical translation information is changed based on the one or more data manipulation instructions.

First claim

What is claimed is:

1. A non-volatile storage system, comprising:
a controller comprising a processor;
local memory connected to the controller, the local memory is configured to store logical to physical translation information, the controller is configured to perform logical to physical translation of a logical address based on the logical to physical translation information stored in the local memory;
non-volatile memory connected to the controller; and
a compute engine connected to the controller and the local memory, the compute engine is separate from the processor, the compute engine is configured to:
receive one or more data manipulation instructions from an entity external to the non-volatile storage system, and
perform one or more data manipulation operations, using a working area in the local memory for the one or more data manipulation instructions, on data from the non-volatile memory in response to the one or more data manipulation instructions;

wherein the controller is further configured to reallocate space in the local memory in response to the received one or more data manipulation instructions by reducing space in the local memory allocated to logical to physical translation information including removing logical to physical translation information for logical addresses not accessed by the one or more data manipulation instructions and adding space in the local memory allocated for the working area for the one or more data manipulation instructions.

2. The non-volatile storage system of claim 1 , wherein:
the controller is further configured to reallocate space in the local memory by receiving an indication of logical addresses with the one or more data manipulation instructions and removing logical to physical translation information from the local memory for logical addresses not included in the indication.

3. The non-volatile storage system of claim 1 , wherein:
the controller is further configured to reallocate space in the local memory by inferring logical addresses accessed by the one or more data manipulation instructions and removing logical to physical translation information from the local memory for logical addresses not accessed by the one or more data manipulation instructions.

4. The non-volatile storage system of claim 1 , wherein:
the controller is further configured to determine logical addresses accessed by the one or more data manipulation instructions and store logical to physical translation information in the local memory for a subset of logical addresses accessed by the one or more data manipulation instructions and, during performance of the one or more data manipulation operations, derive physical addresses for logical addresses used by the instructions that are not in the subset based on physical addresses for logical addresses used by the instructions that are in the subset.

5. The non-volatile storage system of claim 1 , wherein:
the controller is further configured to:
receive the one or more data manipulation instructions from the entity external to the non-volatile storage system and provide the one or more data manipulation instructions to the compute engine;
receive, from the entity external to the non-volatile storage system, logical to physical translation information for logical addresses used by the one or more data manipulation instructions;
change the amount of space allocated in the local memory for logical to physical translation information by adding the received logical to physical translation information for logical addresses used by the one or more data manipulation instructions to the local memory; and
after the compute engine performs the data manipulation operations, update the logical to physical translation information in the local memory based on the data manipulation operations and report updates to the logical to physical translation information to the entity external to the non-volatile storage system.

6. The non-volatile storage system of claim 1 , wherein:
the controller is further configured to receive the one or more data manipulation instructions from the entity external to the non-volatile storage system and provide the one or more data manipulation instructions to the compute engine; and
the controller is further configured to convey to the entity external to the non-volatile storage system at least one of a completion status of the one or more data manipulation operations and the result of the one or more data manipulation operations.

7. The non-volatile storage system of claim 1 , wherein:
the local memory is further configured to store a result of the one or more data manipulation operations.

8. The non-volatile storage system of claim 1 , further comprising:
a memory package separate from and connected to the controller, the memory package includes: one or more non-volatile memory dies that comprise the non-volatile memory, the compute engine and an error correction engine;
wherein the controller comprises a front end processor circuit and a back end processor circuit connected to the front end processor circuit, the memory package is connected to the back end processor circuit, the front end processor circuit is configured to implement a flash translation layer that performs the logical to physical translation, the back end processor circuit is configured to manage memory operations in the memory package at the request of the front end processor circuit.

9. The non-volatile storage system of claim 8 , wherein:
the controller further includes an additional compute engine; and
the additional compute engine is connected to the local memory.

10. The non-volatile storage system of claim 1 , wherein:
the non-volatile memory comprises a three dimensional memory structure in which multiple memory levels are formed above a single substrate, the compute engine is positioned on the substrate and below the three dimensional memory structure; and
the three dimensional memory structure, the substrate and the computer engine comprise a single memory die.

11. The non-volatile storage system of claim 1 , wherein:
the controller includes an interface to a host, the compute engine is positioned on a non-volatile memory side of the interface to the host.

12. A method of operating a storage system comprising persistent storage, a controller, a local compute core and a local memory for the controller, the persistent storage storing logical address to physical address translation tables, the local memory storing a cache for the logical address to physical address translation tables in the persistent storage, the method comprising:
receiving at the controller, from a host system, data manipulation instructions including instructions for performing one or more data manipulation operations on data stored in the persistent storage, the data manipulation instructions refer to logical addresses;
in response to receiving the data manipulation instructions from the host system, reallocating space in the local memory by reducing space in the local memory allocated to the cache for the logical address to physical address translation tables in the persistent storage including removing address translation information for logical addresses not accessed by the data manipulation instructions and adding space in the local memory allocated for a working area in the local memory for the one or more data manipulation operations;
in response to receiving the data manipulation instructions from the host system, performing the one or more data manipulation operations on the data using the local compute core and the working area in the local memory to determine a result of the one or more data manipulati

Assignees

• Western Digital Tech Inc
• Western Digital Techologies Inc

Inventors

• Mehra Pankaj
• Mohan Vidyabhushan

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F2212/657

  Virtual address space management · CPC title

• G06F12/10

  Address translation · CPC title

• G06F12/0692

  Multiconfiguration, e.g. local and global addressing · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title