Virtual addressing with multiple lookup tables and RAID stripes

Patent metadata

Field	Value
Publication number	US-9348758-B2
Application number	US-201313837267-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Sep 24, 2012
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

A method of relating the user logical block address (LBA) of a page of user data to the physical block address (PBA) where the data is stored in a RAID architecture reduces to size of the tables by constraining the location to which data of a plurality of LBAs may be written. Chunks of data from a plurality of LBAs may be stored in a common page of memory and the common memory pages is described by a virtual block address (VBA) referencing the PBA, and each of the LBAs uses the same VBA to read the data.

First claim

What is claimed is:

1. A method of managing a redundant array of inexpensive/independent disks (RAID) memory system, comprising:
configuring a processor for:
maintaining a first lookup table representing a mapping of a user logical block address (LBA) to a virtual block address (VBA), wherein a plurality of LBAs map to a common VBA;
mapping the VBA to a RAID stripe wherein a chunk of data of the LBA is stored on a memory device of a plurality of memory devices;
maintaining a second lookup table representing a mapping of the VBA to a physical block address (PBA) of a memory device of a plurality of memory devices;
selecting chunks from a plurality of LBAs to form a page of data having a VBA value; and
writing the data to the plurality of memory devices in a RAID stripe;
wherein each LBA of the plurality of LBAs forming the page of data map to the VBA value of the page.

2. The method of claim 1 , further comprising:
reading the data corresponding to a user LBA by performing a lookup of the corresponding VBA address in the first lookup table;
performing a lookup of the correspondence of the VBA and the PBA in the second lookup table; and
reading the data from the PBA.

3. The method of claim 1 , wherein the VBA metadata includes a mapping of the chunk location to one of the plurality of LBAs referencing the second table.

4. The method of claim 1 , wherein the first and the second lookup tables are maintained in volatile memory.

5. The method of claim 1 , wherein:
there is a third lookup table re-mapping the PBA address.

6. A computer program product, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:
maintaining a first lookup table representing a mapping of a user logical block address (LBA) to a virtual block address (VBA), wherein a plurality of LBAs map to a common VBA;
mapping the VBA to a redundant array of inexpensive/independent disks (RAID) stripe wherein a chunk of data of the LBA is stored on a memory device of a plurality of memory devices
maintaining a second lookup table representing a mapping of the VBA to a physical block address (PBA) of a memory device of a plurality of memory devices;
selecting chunks from a plurality of LBAs to form a page of data having a VBA value; and
writing the data to the plurality of memory devices in a RAID stripe;
wherein each LBA of the plurality of LBAs forming the page of data map to the VBA value of the page.

7. The computer program product of claim 6 , further comprising computer instructions for:
operating the processor to:
read the data corresponding to a user LBA by performing a lookup of the corresponding VBA address in the first lookup table;
perform a lookup of the correspondence of the VBA and the PBA in the second lookup table; and
read the data from the PBA.

Assignees

• Sk Hynix Memory Solutions Inc

Inventors

• Pignatelli David J

Classifications

• G06F12/0292

  using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10) · CPC title

• G06F3/0662

  Virtualisation aspects · CPC title

• G06F3/0689

  Disk arrays, e.g. RAID, JBOD · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F3/0628

  making use of a particular technique · CPC title