Substrate for Can Package-Type Optical Device and Optical Device using Same
US-2016190398-A1 · Jun 30, 2016 · US
US10454240B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10454240-B2 |
| Application number | US-201615761585-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 15, 2016 |
| Priority date | Sep 23, 2015 |
| Publication date | Oct 22, 2019 |
| Grant date | Oct 22, 2019 |
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A method of producing an optoelectronic component includes providing a carrier including a top side; creating at the top side of the carrier a region that is recessed with respect to a mounting region of the top side to form a step between the mounting region and the recessed region; arranging at the top side of the carrier a metallization extending over the mounting region and the recessed region; creating a separating track in the metallization, wherein the metallization is completely severed at least in sections in the mounting region and is at least not completely severed in the recessed region; and arranging an optoelectronic semiconductor chip above the mounting region of the top side, wherein the optoelectronic semiconductor chip is aligned at the separating track.
Opening claim text (preview).
The invention claimed is: 1. A method of producing an optoelectronic component comprising: providing a carrier comprising a top side; creating at the top side of the carrier a region that is recessed with respect to a mounting region of the top side to form a step between the mounting region and the recessed region; arranging at the top side of the carrier a metallization extending over the mounting region and the recessed region; creating a separating track in the metallization, wherein the metallization is completely severed at least in sections in the mounting region and is at least not completely severed in the recessed region; and arranging an optoelectronic semiconductor chip above the mounting region of the top side, wherein the optoelectronic semiconductor chip is aligned at the separating track. 2. The method as claimed in claim 1 , wherein the optoelectronic semiconductor chip projects over the step. 3. The method as claimed in claim 1 , wherein aligning at the separating track comprises optically detecting a position of a boundary between the metallization completely severed at least in sections in the mounting region and the metallization at least not completely severed in the recessed region. 4. The method as claimed in claim 1 , wherein the separating track is created rectilinearly and perpendicularly to the step. 5. The method as claimed in claim 1 , wherein the carrier is provided in a carrier assemblage, the carrier assemblage is divided after the process of creating the separating track to singulate the carrier, an outer edge of the carrier is formed by the dividing, the recessed region adjoins the outer edge, and the step is oriented parallel to the outer edge. 6. The method as claimed in claim 1 , wherein creating the separating track is carried out by sawing or a laser. 7. The method as claimed in claim 1 , wherein the separating track is created such that the metallization is not severed in the recessed region. 8. The method as claimed in claim 1 , wherein, before arranging the optoelectronic semiconductor chip, solder is arranged on the metallization on the mounting region of the top side, and the optoelectronic semiconductor chip is arranged on the solder. 9. The method as claimed in claim 1 , wherein the optoelectronic semiconductor chip is a laser chip. 10. The method as claimed in claim 9 , wherein the laser chip is arranged such that an emission facet of the laser chip projects over the step. 11. The method as claimed in claim 9 , wherein an anode contact of the laser chip faces the top side of the carrier.
Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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