Method of producing an optoelectronic component

US10454240B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10454240-B2
Application numberUS-201615761585-A
CountryUS
Kind codeB2
Filing dateSep 15, 2016
Priority dateSep 23, 2015
Publication dateOct 22, 2019
Grant dateOct 22, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of producing an optoelectronic component includes providing a carrier including a top side; creating at the top side of the carrier a region that is recessed with respect to a mounting region of the top side to form a step between the mounting region and the recessed region; arranging at the top side of the carrier a metallization extending over the mounting region and the recessed region; creating a separating track in the metallization, wherein the metallization is completely severed at least in sections in the mounting region and is at least not completely severed in the recessed region; and arranging an optoelectronic semiconductor chip above the mounting region of the top side, wherein the optoelectronic semiconductor chip is aligned at the separating track.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of producing an optoelectronic component comprising: providing a carrier comprising a top side; creating at the top side of the carrier a region that is recessed with respect to a mounting region of the top side to form a step between the mounting region and the recessed region; arranging at the top side of the carrier a metallization extending over the mounting region and the recessed region; creating a separating track in the metallization, wherein the metallization is completely severed at least in sections in the mounting region and is at least not completely severed in the recessed region; and arranging an optoelectronic semiconductor chip above the mounting region of the top side, wherein the optoelectronic semiconductor chip is aligned at the separating track. 2. The method as claimed in claim 1 , wherein the optoelectronic semiconductor chip projects over the step. 3. The method as claimed in claim 1 , wherein aligning at the separating track comprises optically detecting a position of a boundary between the metallization completely severed at least in sections in the mounting region and the metallization at least not completely severed in the recessed region. 4. The method as claimed in claim 1 , wherein the separating track is created rectilinearly and perpendicularly to the step. 5. The method as claimed in claim 1 , wherein the carrier is provided in a carrier assemblage, the carrier assemblage is divided after the process of creating the separating track to singulate the carrier, an outer edge of the carrier is formed by the dividing, the recessed region adjoins the outer edge, and the step is oriented parallel to the outer edge. 6. The method as claimed in claim 1 , wherein creating the separating track is carried out by sawing or a laser. 7. The method as claimed in claim 1 , wherein the separating track is created such that the metallization is not severed in the recessed region. 8. The method as claimed in claim 1 , wherein, before arranging the optoelectronic semiconductor chip, solder is arranged on the metallization on the mounting region of the top side, and the optoelectronic semiconductor chip is arranged on the solder. 9. The method as claimed in claim 1 , wherein the optoelectronic semiconductor chip is a laser chip. 10. The method as claimed in claim 9 , wherein the laser chip is arranged such that an emission facet of the laser chip projects over the step. 11. The method as claimed in claim 9 , wherein an anode contact of the laser chip faces the top side of the carrier.

Assignees

Inventors

Classifications

  • Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10454240B2 cover?
A method of producing an optoelectronic component includes providing a carrier including a top side; creating at the top side of the carrier a region that is recessed with respect to a mounting region of the top side to form a step between the mounting region and the recessed region; arranging at the top side of the carrier a metallization extending over the mounting region and the recessed reg…
Who is the assignee on this patent?
Osram Opto Semiconductors Gmbh
What technology area does this patent fall under?
Primary CPC classification H01S5/02272. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 22 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).