Method for the electrical passivation of electrode arrays and/or conductive paths in general, and a method for producing stretchable electrode arrays and/or stretchable conductive paths in general

US10448514B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10448514-B2
Application numberUS-201515310729-A
CountryUS
Kind codeB2
Filing dateJan 8, 2015
Priority dateMay 13, 2014
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method produces a conductive paste comprising 15-20% by weight of PDMS and 80-85% by weight of metallic micro-nano particles, wherein the conductive paste is obtained by repeated addition of singular doses of PDMS to a heptane diluted PDMS low viscosity liquid containing the metallic micro-nano particles, wherein the heptane fraction is allowed to evaporate after addition of each of the singular doses of PDMS. A method forms a conductive path on a support layer, wherein the conductive path is encapsulated by an encapsulation layer comprising at least one via through which at least one portion of the conductive path is exposed, the method comprising filling the at least one via with the conductive paste.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for encapsulating a conductive path formed on a support carrier, said method comprising: forming an encapsulation layer on a substrate, wherein said substrate comprises a transparent carrier; forming at least one through via through said encapsulation layer; aligning said at least one through via with a predefined portion of said conductive path; reciprocally bonding said encapsulation layer and said support carrier; comprising removing said transparent carrier once said encapsulation layer and said support carrier have been reciprocally bonded; forming a silicone rubber layer on said transparent carrier; forming said encapsulation layer on said silicone rubber layer; and peeling off said silicone rubber layer from said encapsulation layer once said encapsulation layer has been bonded to said support carrier. 2. The method as claimed in claim 1 , said method further comprising functionalizing an exposed surface of said silicone rubber layer with a non-stick release layer, wherein said encapsulation layer is deposited on said non-stick release layer. 3. The method as claimed in claim 1 , wherein said support carrier comprises a soft or rubber layer formed on a rigid support, wherein said conductive path is formed on said soft or rubber layer formed on the rigid support, wherein said encapsulation layer is bonded to said soft or rubber layer, said method further comprising removing said rigid support once said soft or rubber layer and said encapsulation layer have been reciprocally bonded. 4. The method as claimed in claim 3 , wherein a non-stick release layer is formed between said rigid support and said soft or rubber layer. 5. The method as claimed in claim 1 , wherein said at least one via is formed by a mechanical punching tool. 6. The method as claimed in claim 1 , wherein said substrate comprises a transparent carrier and said at least one via and said predefined portion of said conductive path are aligned by looking through said transparent carrier, said method further comprising removing said transparent carrier once said encapsulation layer and said support carrier have been reciprocally bonded. 7. The method as claimed in claim 1 , wherein said substrate comprises a transparent carrier and both said transparent carrier and said support carrier comprise alignment marks, and wherein said at least one via and said predefined portion of said conductive path are aligned by aligning said alignment marks, said method further comprising removing said transparent carrier once said encapsulation layer and said support carrier have been reciprocally bonded. 8. A method, comprising: forming a soft or rubber material layer on a rigid support carrier forming a conductive path on said soft or rubber material layer; forming an encapsulation layer on a substrate, wherein said substrate comprises a transparent carrier; forming at least one through via through said encapsulation layer; aligning said at least one through via with a predefined portion of said conductive path; reciprocally bonding said encapsulation layer and said support carrier; removing said transparent carrier after reciprocally bonding said encapsulation layer and said support carrier; forming a silicone rubber layer on said transparent carrier; forming said encapsulation layer on said silicone rubber layer; and peeling off said silicone rubber layer from said encapsulation layer after reciprocally bonding said encapsulation layer and said support carrier. 9. The method as claimed in claim 8 , wherein said encapsulation layer comprises a first encapsulation layer and a second encapsulation layer, said method comprising peeling off said soft or rubber material layer from said first encapsulation layer once said second encapsulation layer has been bonded to said support carrier. 10. The method as claimed in claim 9 , further comprising peeling off said first encapsulation layer from said second encapsulation layer so as to remove conductive material outside said at least one via. 11. The method as claimed in claim 8 , said method further comprising filling said at least one via with a conductive material. 12. The method as claimed in claim 11 , wherein said conductive material is a conductive paste comprising 15-20% by weight of polydimethylsiloxane (PDMS) and 80-85% by weight of metallic micro-nano particles. 13. The method according to claim 12 , wherein said conductive paste is obtained by repeated addition of singular doses of PDMS to a heptane diluted PDMS low viscosity liquid containing said metallic micro-nano particles, wherein the heptane is allowed to evaporate after addition of each of said singular doses of PDMS. 14. The method as claimed in claim 13 , wherein the heptane diluted PDMS low viscosity liquid containing said metallic micro-nano particles is obtained by adding 100 mg of metallic micro-nano particles to 15 μL of said heptane diluted PDMS low viscosity liquid. 15. The method according to claim 12 , wherein said conductive paste is spread on said first encapsulation layer and pressed into said at least one via. 16. The method according to claim 12 , wherein said metallic micro-nano particles comprise micro-nano particles of one or more of platinum, iridium, iridium oxide. 17. The method according to claim 11 , wherein the metallic micro-nano particles are sized between 0.5 μm and 1.2 μm. 18. The method as claimed in claim 8 , further comprising removing said rigid carrier from said soft or rubber material layer. 19. The method as claimed in claim 8 , wherein said conductive path is evaporated on said layer of soft or rubber material.

Assignees

Inventors

Classifications

  • Flexible insulating substrates · CPC title

  • for connecting multiple chips together · CPC title

  • Array electrodes (including any electrode arrangement with more than one electrode for at least one of the polarities) · CPC title

  • characterised by the manufacture of electrodes · CPC title

  • Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)} · CPC title

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What does patent US10448514B2 cover?
A method produces a conductive paste comprising 15-20% by weight of PDMS and 80-85% by weight of metallic micro-nano particles, wherein the conductive paste is obtained by repeated addition of singular doses of PDMS to a heptane diluted PDMS low viscosity liquid containing the metallic micro-nano particles, wherein the heptane fraction is allowed to evaporate after addition of each of the singu…
Who is the assignee on this patent?
Ecole Polytechnique Fed Lausanne Epfl
What technology area does this patent fall under?
Primary CPC classification H05K3/007. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).