Method and apparatus for enabling a timing synchronization circuit
US-RE46005-E · May 17, 2016 · US
US10447493B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10447493-B2 |
| Application number | US-201615342897-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 3, 2016 |
| Priority date | Jul 26, 2016 |
| Publication date | Oct 15, 2019 |
| Grant date | Oct 15, 2019 |
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An apparatus includes at least one transceiver configured to transmit or receive at least one data signal over a shared physical medium. The physical medium includes a bus configured to be coupled to multiple devices including the apparatus and provides a multi-drop capability. The at least one transceiver is configured to transmit or receive the at least one data signal at a rate of more than 10 Mbps. In some embodiments, the apparatus includes a MAC driver configured to route network layer data over the physical medium. In other embodiments, the apparatus includes a MAC driver configured to control transmissions and receptions of network layer data over the physical medium by the at least one transceiver and a logic device configured to control physical layer signaling, interface with the MAC driver, enable the transmissions and receptions of the network layer data on the physical medium, and implement collision detection and avoidance.
Opening claim text (preview).
What is claimed is: 1. An apparatus comprising: at least one transceiver configured to transmit or receive at least one clock signal and at least one data signal over a shared physical medium, the shared physical medium comprising a bus configured to be coupled to multiple devices including the apparatus and providing a multi-drop capability, the at least one transceiver configured to transmit or receive the signals at a rate of more than 10 megabits per second (Mbps), wherein the at least one transceiver operates in one of a master mode or a slave mode, the at least one transceiver transmits the at least one clock signal when in the master mode and receives the at least one data signal when in the slave mode; and a media access control (MAC) driver configured to exchange network layer data over the shared physical medium, wherein the MAC driver is configured to: receive data link frames sent over the shared physical medium, extract the TCP/IP packets from the data link frames, send the TCP/IP packets to a TCP/IP stack, wrap outbound TCP/IP packets from the TCP/IP stack in the data link frames that are sent over the shared physical medium, determine that the apparatus is not functioning in the master mode, and cause the at least one transceiver to receive the at least one clock signal over the shared physical medium and use an inter-frame gap to allow the multiple devices to synchronize its operation with the bus. 2. The apparatus of claim 1 , wherein the MAC driver is configured to: determine that the apparatus is functioning in the master mode; and cause the at least one transceiver to transmit the at least one clock signal over the shared physical medium in response to determining that the apparatus is functioning in the master mode. 3. The apparatus of claim 2 , wherein the MAC driver is further configured to send a token to other devices over the shared physical medium when functioning in the master mode, the token allowing the other devices to transmit data over the shared physical medium. 4. The apparatus of claim 1 , wherein the at least one transceiver comprises at least one multipoint low-voltage differential signaling (M-LVDS) transceiver. 5. A method comprising: transmitting or receiving at least one clock signal and at least one data signal over a high-speed shared physical medium using at least one transceiver, the shared physical medium comprising a bus coupled to multiple devices and providing a multi-drop capability, the at least one transceiver configured to transmit or receive the signals at a rate of more than 10 megabits per second (Mbps), wherein the at least one transceiver operates in one of a master mode or a slave mode, the at least one transceiver transmits the at least one clock signal when in the master mode and receives the at least one data signal when in the slave mode; exchanging network layer data over the shared physical medium using a media access control (MAC) driver; receiving data link frames sent over the shared physical medium; extracting the TCP/IP packets from the data link frames; sending the TCP/IP packets to a TCP/IP stack; wrapping outbound TCP/IP packets from the TCP/IP stack in the data link frames that are sent over the shared physical medium; determining that the apparatus is not functioning in the master mode, and causing the at least one transceiver to receive the at least one clock signal over the shared physical medium and use an inter-frame gap to allow the multiple devices to synchronize its operation with the bus. 6. The method of claim 5 , further comprising: identifying the devices coupled to the bus using the MAC driver when the MAC driver is operating in a device in the master mode. 7. The method of claim 5 , wherein the shared physical medium comprises an electrical or optical medium. 8. The method of claim 5 , wherein the at least one transceiver supports multiple channels configured to be coupled to different numbers of conductors in the shared physical medium and provide an adjustable bandwidth. 9. The method of claim 5 , wherein the at least one transceiver is configured to transmit or receive the signals at a rate of more than 100 Mbps. 10. An apparatus comprising: at least one transceiver configured to transmit or receive at least one data signal over a shared physical medium, the shared physical medium comprising a bus configured to be coupled to multiple devices including the apparatus and providing a multi-drop capability, the at least one transceiver configured to transmit or receive the at least one data signal at a rate of more than 10 megabits per second (Mbps), wherein the at least one transceiver operates in one of a master mode or a slave mode, the at least one transceiver transmits the at least one clock signal when in the master mode and receives the at least one data signal when in the slave mode; a media access control (MAC) driver configured to control transmissions and receptions of network layer data over the shared physical medium by the at least one transceiver, wherein the MAC driver is configured to: receive data link frames sent over the shared physical medium, extract the TCP/IP packets from the data link frames, send the TCP/IP packets to a TCP/IP stack, wrap outbound TCP/IP packets from the TCP/IP stack in the data link frames that are sent over the shared physical medium, determine that the apparatus is not functioning in the master mode, and cause the at least one transceiver to receive the at least one clock signal over the shared physical medium and use an inter-frame gap to allow the multiple devices to synchronize its operation with the bus; and a logic device configured to control physical layer signaling and interface with the MAC driver, the logic device configured to enable the transmissions and receptions of the network layer data on the shared physical medium and to implement collision detection and avoidance. 11. The apparatus of claim 10 , wherein the MAC driver is configured to interface with an Industrial Internet of Things (HOT) protocol stack. 12. The apparatus of claim 10 , wherein the logic device comprises at least one of: a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD), discrete digital logic, and a microcontroller. 13. The apparatus of claim 10 , wherein an interface between the logic device and the MAC driver comprises at least one of: a Media Independent Interface (MII), a Reduced Media Independent Interface (RMII), a Gigabit Media Independent Interface (RMII), a Serial Peripheral Interface (SPI), and a Universal Asynchronous Receiver/Transmitter (UART) interface. 14. The apparatus of claim 10 , wherein: the at least one transceiver comprises at least one multipoint low-voltage differential signaling (M-LVDS) transceiver; and the at least one transceiver is configured to transmit or receive the at least one data signal at a rate of more than 100 Mbps. 15. A method comprising: transmitting or receiving at least one data signal over a high-speed shared physical medium using at least one transceiver, the shared physical medium including a bus coupled to multiple devices and providing a multi-drop capability, the at least one transceiver configured to transmit or receive the at least one data signal at a rate of more than 10 megabits per second (Mbps), wherein the at least one transceiver operates in one of a master mode or a slave mode, the at least one transceiver transmits the at least one clock signal when in the master mode and receives the at least one data signal when in the
Flexible bus arrangements (arrangements for maintenance or administration involving management of faults; events, alarms H04L41/06; automatic restoration of network faults H04L41/0654) · CPC title
in the data link layer [OSI layer 2], e.g. HDLC · CPC title
Bus networks · CPC title
Encapsulation of packets · CPC title
Management of data rate on the bus (systems modifying transmission characteristics according to link quality H04L1/0001) · CPC title
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