Apparatuses including memory devices and related electronic systems

Patent metadata

Field	Value
Publication number	US-10446750-B2
Application number	US-201816196681-A
Country	US
Kind code	B2
Filing date	Nov 20, 2018
Priority date	Apr 5, 2007
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

Memory devices having memory cells comprising variable resistance material include an electrode comprising a single nanowire. Various methods may be used to form such memory devices, and such methods may comprise establishing contact between one end of a single nanowire and a volume of variable resistance material in a memory cell. Electronic systems include such memory devices.

First claim

What is claimed is:

1. An apparatus, comprising:
an array of memory devices, at least one memory device of the array comprising:
a conductive pad;
a generally conical structure having a tip and a base coupled to the conductive pad; and
a single nanowire extending from the tip of the generally conical structure, wherein an effective cross-sectional area of the tip of the generally conical structure is sized to facilitate formation of only the single nanowire thereon; and

at least one conductive line connecting memory devices of the array including the at least one memory device of the array.

2. The apparatus of claim 1 , wherein the at least one memory device comprises a volume of variable resistance material located between the single nanowire and the at least one conductive line.

3. The apparatus of claim 2 , wherein the at least one memory device comprises an electrode located between the volume of variable resistance material and the at least one conductive line.

4. The apparatus of claim 1 , wherein the at least one memory device comprises a dielectric material laterally adjacent the generally conical structure.

5. An electronic system comprising:
at least one processor;
at least one memory device in electrical communication with the at least one processor, the at least one memory device comprising:
a conductive pad;
a generally conical structure coupled to the conductive pad; and
a single nanowire extending from an end of the generally conical structure opposite the conductive pad, wherein the end of the generally conical structure is sized to facilitate formation of only the single nanowire thereon; and

at least one of an input device and an output device in electrical communication with the at least one processor.

6. The electronic system of claim 5 , wherein the single nanowire comprises at least one of a hollow nanotube or a substantially solid nanowire.

7. The electronic system of claim 5 , wherein the at least one memory device comprises a volume of variable resistance material in contact with an end of the single nanowire opposite the generally conical structure.

8. The electronic system of claim 7 , wherein the volume of variable resistance material comprises a phase change material.

9. The electronic system of claim 7 , wherein the at least one memory device comprises an electrode connected to the volume of variable resistance material on a side of the volume of variable resistance material opposite the single nanowire.

10. The electronic system of claim 9 , further comprising:
a first conductive line in electrical communication with the electrode through an electrical contact; and
a second conductive line in electrical communication with the conductive pad through another electrical contact.

11. The electronic system of claim 9 , wherein an average thickness of the volume of variable resistance material between the single nanowire and the electrode is about twice an average diameter of the single nanowire.

12. The apparatus of claim 2 , wherein the single nanowire is in direct physical contact with each of the generally conical structure and the volume of variable resistance material, the single nanowire being configured to provide electrical contact between the conductive pad and the volume of variable resistance material.

13. The apparatus of claim 1 , wherein the single nanowire comprises an integrated PN junction or a superlattice structure.

14. The apparatus of claim 1 , wherein a cross-sectional area of the tip of the generally conical structure is less than a cross-sectional area of the base of the generally conical structure.

15. The apparatus of claim 1 , wherein the generally conical structure comprises a catalyst material configured to catalyze formation or growth of the single nanowire thereon.

16. The apparatus of claim 1 , wherein the at least one conductive line comprises a first elongated laterally extending conductive trace extending in a first horizontal direction and a second elongated laterally extending conductive trace extending in a second horizontal direction, generally transverse to the first horizontal direction.

17. The electronic system of claim 7 , wherein the single nanowire is located and configured to provide a sole, low-resistance electrical pathway between the conductive pad and the volume of variable resistance material.

18. The electronic system of claim 7 , wherein the volume of variable resistance material is configured to exhibit a first state having a first resistivity and a second state having a second resistivity, different than the first resistivity of the first state.

19. The electronic system of claim 9 , wherein the at least one memory device comprises another electrode comprising the conductive pad, the generally conical structure, and the single nanowire, the memory device being configured to allow current to flow between the electrode and the other electrode in response to a voltage applied therebetween.

20. The electronic system of claim 19 , wherein a cross-sectional area of the electrode in contact with the volume of variable resistance material is greater than a cross-sectional area of the other electrode in contact with the volume of variable resistance material.

Assignees

• Ovonyx Memory Tech Llc

Inventors

• Liu Jun
• Violette Michael P

Classifications

• H01L45/16

  Electricity · mapped topic

• H01L27/2463

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic

• H01L45/1273 Primary

  Electricity · mapped topic

• H01L45/147

  Electricity · mapped topic