Semiconductor devices comprising nickel— and copper—containing interconnects

US10446440B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10446440-B2
Application numberUS-201816106611-A
CountryUS
Kind codeB2
Filing dateAug 21, 2018
Priority dateSep 2, 2004
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: an interconnect comprising a nickel material surrounding a copper-containing material; and a metal interconnection structure surrounding an end of the interconnect, the metal interconnection structure electrically coupled to the interconnect by another nickel material. 2. The semiconductor device of claim 1 , wherein the metal interconnection structure comprises an annular ring, a bond pad, a component lead, a metal wire, or other metal layer. 3. The semiconductor device of claim 1 , wherein the copper-containing material comprises a conductive pathway comprising copper. 4. The semiconductor device of claim 1 , wherein the interconnect further comprises a seed material surrounding the nickel material. 5. The semiconductor device of claim 1 , wherein the metal interconnection structure comprises copper; aluminum, or combinations thereof. 6. The semiconductor device of claim 1 , wherein the metal interconnection structure comprises a thickness of from approximately 1.0 μm to approximately 1.5 μm. 7. The semiconductor device of claim 1 , further comprising a passivation material comprising at least one of silicon oxide and silicon nitride adjacent to the metal interconnection structure. 8. The semiconductor device of claim 7 , wherein the passivation material comprises a thickness of from approximately 0.5 μm to 10 μm. 9. The semiconductor device of claim 1 , wherein the nickel material comprises a thickness of from approximately 3 μm to approximately 5 μm. 10. The semiconductor device of claim 1 , wherein the another nickel material comprises a thickness of from approximately 500 Å to approximately 10 μm. 11. A semiconductor device, comprising: an interconnect at least partially extending through a material, the interconnect comprising a nickel material surrounding a copper core; a copper bond pad around an end of the interconnect; and another nickel material over the copper bond pad and electrically coupled to the interconnect. 12. The semiconductor device of claim 11 , wherein the interconnect comprises a through-water-interconnect. 13. The semiconductor device of claim 11 , wherein the interconnect comprises a blind-wafer-interconnect. 14. The semiconductor device of claim 11 , wherein the interconnect further comprises one or more of silver, tin, lead, indium, and antimony. 15. The semiconductor device of claim 11 , wherein the interconnect further comprises a tungsten material around the nickel material. 16. The semiconductor device of claim 15 , wherein the tungsten material comprises a thickness of from approximately 0.02 μm to approximately 1 μm. 17. The semiconductor device of claim 15 , further comprising a titanium nitride material adjacent to the tungsten material. 18. A semiconductor device, comprising: an interconnect extending through a material, the interconnect comprising a nickel material surrounding a copper core; a copper bond pad around an end of the interconnect; and another nickel material adjacent the copper bond pad and electrically coupled to the interconnect. 19. The semiconductor device of claim 18 , wherein the copper core comprises a conductive pathway comprising copper. 20. The semiconductor device of claim 18 , wherein the copper core further comprises one or more of silver, tin, lead, indium, and antimony.

Assignees

Inventors

Classifications

  • comprising etching via holes through pads or through electrodes · CPC title

  • characterised by the filling method or the material of the conductive fill · CPC title

  • comprising use of blind vias during the manufacture · CPC title

  • using a liquid · CPC title

  • the interconnections being through-semiconductor vias · CPC title

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What does patent US10446440B2 cover?
A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/057. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).