Liquid crystal display device and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-10444586-B2
Application number	US-201816129503-A
Country	US
Kind code	B2
Filing date	Sep 12, 2018
Priority date	Jan 20, 2016
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

A liquid crystal display (LCD) device capable of perventing impurities from permeating into a channel area of a switching element, the LCD device including: a gate electrode above a substrate; a semiconductor layer which overlaps the gate electrode; a drain electrode and a source electrode which overlap the semiconductor layer; an ohmic contact layer between the semiconductor layer and the drain electrode and between the semiconductor layer and the source electrode; a pixel electrode which is connected to one of the drain electrode and the source electrode; and a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer comprising fluorine. A concentration of the fluorine is decreasing, as the fluorine of the gate insulating layer being more adjacent to the substrate.

First claim

What is claimed is:

1. A method of manufacturing a liquid crystal display device, the method comprising:
forming a gate electrode above a substrate;
forming a gate insulating layer above the gate electrode;
forming a semiconductor material above the gate insulating layer;
forming a first photoresist pattern and a second photoresist pattern above the semiconductor material, the second photoresist pattern having a smaller thickness than a thickness of the first photoresist pattern;
patterning, using the first photoresist pattern and the second photoresist pattern as a mask, the semiconductor material to form a semiconductor layer which overlaps the gate electrode;
removing a portion of the first photoresist pattern and the second photoresist pattern to form a third photoresist pattern which is disposed to correspond to a channel area of the semiconductor layer;
hydrophobizating the third photoresist pattern;
forming an impurity semiconductor material above the gate insulating layer and the semiconductor layer using the third photoresist pattern that is hydrophobizated as a mask;
removing the third photoresist pattern;
forming a conductive material above the impurity semiconductor material and the semiconductor layer;
patterning, using a fourth photoresist pattern as a mask, the impurity semiconductor material and the conductive material to form a first ohmic contact layer, a second ohmic contact layer, a drain electrode, and a source electrode; and
forming a pixel electrode which is connected to one of the drain electrode and the source electrode.

2. The method as claimed in claim 1 , wherein the hydrophobizating of the third photoresist pattern comprises exposing the third photoresist pattern to NF 3 .

3. The method as claimed in claim 1 , wherein each of the first ohmic contact layer and the second ohmic contact layer has an impurity concentration of about 2*10 21 atom/cm 3 or higher.

4. The method as claimed in claim 3 , wherein the forming of the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode comprises:
forming the fourth photoresist pattern above the conductive material; and
patterning, using the fourth photoresist pattern as a mask, the conductive material and the impurity semiconductor material in a wet etching method to form the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode.

5. A method of manufacturing a liquid crystal display device, the method comprising:
forming a gate electrode above a substrate;
forming a gate insulating layer above the gate electrode;
forming a semiconductor material above the gate insulating layer;
forming a first photoresist pattern and a second photoresist pattern above the semiconductor material, the second photoresist pattern having a smaller thickness than a thickness of the first photoresist pattern;
patterning, using the first photoresist pattern and the second photoresist pattern as a mask, the semiconductor material to form a semiconductor layer which overlaps the gate electrode;
removing a portion of the first photoresist pattern and the second photoresist pattern to form a third photoresist pattern which is disposed to correspond to a channel area of the semiconductor layer;
forming an impurity semiconductor material above the gate insulating layer, the semiconductor layer, and the third photoresist pattern;
removing the third photoresist pattern and the impurity semiconductor material above the third photoresist pattern in a lift-off method;
forming a conductive material above the impurity semiconductor material and the semiconductor layer;
patterning, using a fourth photoresist pattern as a mask, the impurity semiconductor material and the conductive material to form a first ohmic contact layer, a second ohmic contact layer, a drain electrode, and a source electrode; and
forming a pixel electrode which is connected to one of the drain electrode and the source electrode.

6. The method as claimed in claim 5 , wherein each of the first ohmic contact layer and the second ohmic contact layer has an impurity concentration of about 2*10 21 atom/cm 3 or higher.

7. The method as claimed in claim 6 , wherein the forming of the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode comprises:
forming the fourth photoresist pattern above the conductive material; and
patterning, using the fourth photoresist pattern as a mask, the conductive material and the impurity semiconductor material in a wet etching method to form the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode.

8. A method of manufacturing a liquid crystal display device, the method comprising:
forming a gate electrode above a substrate;
forming a gate insulating layer above the gate electrode;
forming a semiconductor material above the gate insulating layer;
forming a first photoresist pattern above the semiconductor material;
patterning, using the first photoresist pattern as a mask, the semiconductor material to form a semiconductor layer which overlaps the gate electrode;
hydrophobizating the first photoresist pattern;
forming an impurity semiconductor material above an inclined surface of the semiconductor layer and the gate insulating layer using the first photoresist pattern that is hydrophobizated as a mask;
removing the first photoresist pattern;
forming a conductive material above the impurity semiconductor material and the semiconductor layer;
patterning, using a second photoresist pattern as a mask, the impurity semiconductor material and the conductive material to form a first ohmic contact layer, a second ohmic contact layer, a drain electrode, and a source electrode; and
forming a pixel electrode which is connected to one of the drain electrode and the source electrode.

9. The method as claimed in claim 8 , wherein the hydrophobizating of the first photoresist pattern comprises exposing the first photoresist pattern to NF 3 .

10. The method as claimed in claim 8 , wherein each of the first ohmic contact layer and the second ohmic contact layer has an impurity concentration of about 2*10 21 atom/cm 3 or higher.

11. The method as claimed in claim 10 , wherein the forming of the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode comprises:
forming a third photoresist pattern above the conductive material; and
patterning, using the third photoresist pattern as a mask, the conductive material and the impurity semiconductor material in a wet etching method to form the first ohmic contact layer, the second ohmic contact layer, the drain electrode, and the source electrode.

Assignees

• Samsung Display Co Ltd

Inventors

• Ahn Taeyoung
• JEON Bogeon
• Jeon Wooseok
• Chung Yungbin
• CHO Eunjeong

Classifications

• H10P76/204

  of organic photoresist masks · CPC title

• G02F2201/123

  pixel · CPC title

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• G02F1/1368 Primary

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F2001/136295

  Physics · mapped topic