Array substrate, display panel, display apparatus, and fabricating method thereof

US10444580B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10444580-B2
Application numberUS-201715762189-A
CountryUS
Kind codeB2
Filing dateMar 30, 2017
Priority dateMar 30, 2017
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present application discloses a thin film transistor including a base substrate; an active layer; and a first linear polarization block configured to shield at least a portion of the active layer from light. A projection of the first linear polarization block on the base substrate at least partially overlaps with that of the active layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A thin film transistor, comprising: a base substrate; an active layer; a first linear polarization block configured to shield at least a portion of the active layer from light; and a second linear polarization block corresponding to the first linear polarization block; wherein a projection of the first linear polarization block on the base substrate at least partially overlaps with that of the active layer; a projection of the second linear polarization block on the base substrate at least partially overlaps with that of the active layer; the first linear polarization block has a first transmission axis; the second linear polarization block has a second transmission axis substantially perpendicular to the first transmission axis; the active layer is on a side of one of the first linear polarization block and the second linear polarization block closer to the base substrate; and the first linear polarization block and the second linear polarization block are configured to shield at least a portion of the active layer from light emitted from a light emitting layer. 2. The thin film transistor of claim 1 , wherein the first linear polarization block is made of a nano-linear polarization material. 3. The thin film transistor of claim 2 , wherein the nano-linear polarization material comprises a compound selected from the group consisting of magnesium fluoride (MgF 2 ), zinc oxide (ZnO), titanium oxide (TiO 2 ), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), magnesium zinc oxide (MZO), gallium zinc oxide (GZO), ruthenium oxide (RuO x ), iridium oxide (IrO x ), aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), silicon on glass, and silicon nitride (Si 3 N 4 ). 4. The thin film transistor of claim 1 , further comprising a gate electrode on a side of the active layer away from the first linear polarization block; wherein the projection of the first linear polarization block on the base substrate substantially overlaps with that of the gate electrode. 5. The thin film transistor of claim 1 , further comprising a buffer layer between the first linear polarization block and the active layer. 6. The thin film transistor of claim 1 , wherein the first linear polarization block is made of a non-metal material. 7. An array substrate, comprising: a base substrate; a plurality of thin film transistors on the base substrate, a respective one of which comprising an active layer; a first linear polarization layer comprising a plurality of first linear polarization blocks, a respective one of which configured to shield at least a portion of the active layer from light; and a second linear polarization layer comprising a plurality of second linear polarization blocks respectively corresponding to the plurality of first linear polarization blocks; wherein a projection of one of the plurality of first linear polarization blocks on the base substrate at least partially overlaps with that of the active layer; a projection of the one of the plurality of second linear polarization blocks on the base substrate at least partially overlaps with that of the active layer; a respective one of the plurality of first linear polarization blocks has a first transmission axis; a respective one of the plurality of second linear polarization blocks has a second transmission axis substantially perpendicular to the first transmission axis; the active layer is on a side of one of the plurality of first linear polarization blocks and one of the plurality of second linear polarization blocks closer to the base substrate; and the one of the plurality of first linear polarization blocks and the one of the plurality of second linear polarization blocks are configured to shield at least a portion of the active layer from light emitted from a light emitting layer. 8. The array substrate of claim 7 , wherein the first linear polarization layer is made of a nano-linear polarization material. 9. The array substrate of claim 8 , wherein the first linear polarization block is made of a non-metal material. 10. The array substrate of claim 8 , wherein the nano-linear polarization material comprises a compound selected from the group consisting of magnesium fluoride (MgF 2 ), zinc oxide (ZnO), titanium oxide (TiO 2 ), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), magnesium zinc oxide (MZO), gallium zinc oxide (GZO), ruthenium oxide (RuO x ), iridium oxide (IrO x ), aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), silicon on glass, and silicon nitride (Si 3 N 4 ). 11. The array substrate of claim 7 , wherein each of the plurality of thin film transistors further comprises a gate electrode on a side of the active layer away from the one of the plurality of first linear polarization blocks; and the projection of the one of the plurality of first linear polarization blocks on the base substrate substantially overlaps with that of the gate electrode. 12. The array substrate of claim 7 , further comprising a buffer layer between the first linear polarization layer and the active layer. 13. A display panel, comprising the array substrate of claim 7 .

Assignees

Inventors

Classifications

  • Polarisers · CPC title

  • Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

  • Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

  • Micro- or nanomaterials · CPC title

  • in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

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Frequently asked questions

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What does patent US10444580B2 cover?
The present application discloses a thin film transistor including a base substrate; an active layer; and a first linear polarization block configured to shield at least a portion of the active layer from light. A projection of the first linear polarization block on the base substrate at least partially overlaps with that of the active layer.
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/136209. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).