Shielded photonic integrated circuit

US10444451B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10444451-B2
Application numberUS-201916238692-A
CountryUS
Kind codeB2
Filing dateJan 3, 2019
Priority dateDec 9, 2015
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a photonic integrated circuit may be constructed with light shields integrally built in.

First claim

Opening claim text (preview).

What is claimed is: 1. A photonic integrated circuit comprising: a substrate; a dielectric layer; a semiconductor layer including a first integrated optical device comprising a first slab waveguide and at least one input/output waveguide between the dielectric layer and the substrate; and an optically-absorbing, light-shield structure surrounding the first slab waveguide, except for at least one opening for the at least one input/output waveguide, capable of shielding the first slab waveguide from stray light; wherein the optically-absorbing, light-shield structure comprises a first wall in the dielectric layer, which does not extend down to the substrate, whereby the optically-absorbing, light-shield structure and the substrate suppress optical crosstalk between the first integrated optical device and other optical devices. 2. The photonic integrated circuit according to claim 1 , wherein the first slab waveguide comprises a photosensitive slab capable of receiving light from the input/output waveguide. 3. The photonic integrated circuit according to claim 2 , wherein the optically-absorbing, light-shield structure and the photosensitive slab are comprised of the same optically absorbing material. 4. The photonic integrated circuit according to claim 3 , wherein the optically absorbing material comprises germanium. 5. The photonic integrated circuit according to claim 1 , wherein the optically-absorbing, light-shield structure comprises germanium. 6. The photonic integrated circuit according to claim 1 , wherein the optically-absorbing, light-shield structure comprises silicon doped to a carrier concentration of at least 10 18 cm −3 . 7. The photonic integrated circuit according to claim 1 , wherein the optically-absorbing, light-shield structure comprises a material with an optical transmission of less than 10%. 8. The photonic integrated circuit according to claim 1 , further comprises a second integrated optical device over the substrate adjacent to the first integrated optical device with the optically-absorbing, light-shield structure therebetween. 9. The photonic integrated circuit according to claim 8 , wherein the second integrated optical device comprises a light emitting device. 10. The photonic integrated circuit according to claim 1 , further comprising a metal shield layer mounted on the optically-absorbing, light-shield structure over the first slab waveguide for shielding the first integrated optical device from stray light. 11. The photonic integrated circuit according to claim 1 , further comprising a semiconductor shield layer mounted on the optically-absorbing, light-shield structure over the first slab waveguide for shielding the first integrated optical device from stray light. 12. The photonic integrated circuit according to claim 1 , wherein the optically-absorbing, light-shield structure also comprises a second wall surrounding the integrated optical device on top of the dielectric layer comprising at least partially reflecting and/or scattering material. 13. The photonic integrated circuit according to claim 12 , wherein the second wall comprises photonic crystal or a plasmonic structure. 14. The photonic integrated circuit according to claim 12 , wherein the second wall extends from the first wall, and does not extend down to the semiconductor layer. 15. The photonic integrated circuit according to claim 14 , wherein the optically-absorbing, light-shield structure further comprises a metal shield layer mounted on the second wall over the first slab waveguide for shielding the first integrated optical device from stray light. 16. The photonic integrated circuit according to claim 14 , further comprising a semiconductor shield layer mounted on the optically-absorbing, light-shield structure over the first slab waveguide for shielding the first integrated optical device from stray light. 17. The photonic integrated circuit according to claim 1 , wherein a first input/output waveguide of the at least one input/output waveguides includes a serpentine structure; and wherein the optically-absorbing, light-shield structure includes serpentine side walls extending on both sides of the serpentine structure.

Assignees

Inventors

Classifications

  • G02B6/4277Primary

    Protection against electromagnetic interference [EMI], e.g. shielding means (shielding of electric apparatus H05K9/00, of instruments G12B17/00) · CPC title

  • Grating · CPC title

  • Basic optical elements, e.g. light-guiding paths · CPC title

  • Isolator · CPC title

  • Combinations of two or more optical elements · CPC title

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What does patent US10444451B2 cover?
A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a ph…
Who is the assignee on this patent?
Elenion Tech Llc
What technology area does this patent fall under?
Primary CPC classification G02B6/4277. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).