Chirp generator

Patent metadata

Field	Value
Publication number	US-10439555-B2
Application number	US-201715832857-A
Country	US
Kind code	B2
Filing date	Dec 6, 2017
Priority date	Dec 29, 2016
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

A chirp-generator comprising a phase-detector for providing a phase-difference-signal representative of a phase difference between a clock-input-signal and a feedback-signal. A VCO-circuit is configured to provide a chirp-generator-output-signal based on the phase-difference-signal. The VCO-circuit comprises a switched-varactor-bank, which includes a plurality of varactors, and a varactor-switch associated with each of the plurality of varactors. The varactor-switch is configured to selectively control whether or not the associated varactor contributes to the capacitance of the VCO-circuit, based on the state of a varactor-control-signal. The chirp-generator also includes a feedback-component configured to: receive the chirp-generator-output-signal; and apply a variable-multiplication-factor to the chirp-generator-output-signal in order to provide the feedback signal for the phase-detector. A controller provides a sequence of different variable-multiplication-factors to the feedback-component; and provides varactor-control-signals to the plurality of varactors such that the varactors are sequentially controlled such that they contribute to the capacitance of the VCO-circuit.

First claim

The invention claimed is:

1. A chirp-generator comprising:
a phase-detector configured to:
receive a clock-input-signal;
receive a feedback-signal; and
provide a phase-difference-signal representative of a phase difference between the clock-input-signal and the feedback-signal;

a voltage-controlled-oscillator that includes a VCO-circuit, wherein the VCO-circuit is configured to provide a chirp-generator-output-signal based on the phase-difference-signal, where the VCO-circuit comprises:
a switched-varactor-bank, which includes:
a plurality of varactors, and
a varactor-switch associated with each of the plurality of varactors, wherein the varactor-switch is configured to selectively control whether or not the associated varactor contributes to capacitance of the VCO-circuit, based on a varactor-control-signal;

a feedback-component configured to:
receive the chirp-generator-output-signal; and
apply a variable-division-factor to the chirp-generator-output-signal in order to provide the feedback signal for the phase-detector, wherein the phase-detector, the voltage-controlled-oscillator, and the feedback-component comprise a phase-locked-loop having a PLL-bandwidth and a rate of change of capacitance of the switched-varactor-bank, when it is controlled to contribute to the capacitance of the VCO-circuit, is slower than the PLL-bandwidth;

a controller configured to:
provide a sequence of different variable-division-factors to the feedback-component; and
provide varactor-control-signals to the plurality of varactors such that the plurality of varactors are sequentially controlled such that they contribute to the capacitance of the VCO-circuit.

2. The chirp-generator of claim 1 , wherein the sequence of the different variable-division-factors comprises a set of values that increase or decrease linearly over time.

3. The chirp-generator of claim 1 , wherein the varactor-control-signals are configured to sequentially control the plurality of varactors such that each one contributes to the capacitance of the VCO-circuit in turn.

4. The chirp-generator of claim 1 , wherein the varactor-control-signals are configured to sequentially control the plurality of varactors such that each one starts contributing to the capacitance of the VCO-circuit in turn, at moments in time that are evenly spaced apart during a chirp in the chirp-generator-output-signal.

5. The chirp-generator of claim 1 , wherein the switched-varactor-bank further comprises:
a varactor-biasing-circuit associated with each of the plurality of varactors, wherein each varactor-biasing-circuit comprises:
a bias-voltage-connection configured to provide a bias voltage to the associated varactor;
a chirp-bias-current-source;
a chirp-reset-current-source;
a varactor-chirp-switch configured to selectively connect the chirp-bias-current-source to the bias-voltage-connection; and
a varactor-reset-switch configured to selectively connect the chirp-reset-current-source to the bias-voltage-connection, wherein, based on the state of the varactor-control-signal, the varactor-biasing-circuit is configured to:
close the varactor-chirp-switch and open the varactor-reset-switch in order for the associated varactor to contribute to the capacitance of the VCO-circuit; and
open the varactor-chirp-switch and close the varactor-reset-switch in order for the associated varactor not to contribute to the capacitance of the VCO-circuit.

6. The chirp-generator of claim 5 , wherein a magnitude of the chirp-reset-current-source is greater than a magnitude of the chirp-bias-current-source.

7. The chirp-generator of claim 5 , wherein each varactor-biasing-circuit further comprises:
a low-pass filter that is connected between the bias-voltage-connection and ground.

8. The chirp-generator of claim 1 , wherein the voltage-controlled-oscillator further comprises:
a switched-coarse-bank that includes a plurality of capacitors that are either included in or excluded from the VCO-circuit based on a received coarse-control-signal.

9. The chirp-generator of claim 8 , wherein the coarse-control-signal is a static signal during use, which is configured to set a capacitance level of the switched-coarse-bank.

10. The chirp-generator of claim 1 , wherein each of the plurality of varactors comprises a pair of varactors.

11. The chirp-generator of claim 1 , wherein the voltage-controlled-oscillator comprises a positive-VCO-output-terminal and a negative-VCO-output-terminal, either of which is configured to provide the chirp-generator-output-signal, and the switched-varactor-bank is connected between the positive-VCO-output-terminal and the negative-VCO-output-terminal.

12. The chirp-generator of claim 1 , wherein the feedback-component is configured to apply an integer or fractional variable-division-factor to the chirp-generator-output-signal in order to provide the feedback signal for the phase-detector.

13. A method of operating a chirp-generator, the method comprising:
receiving a clock-input-signal;
receiving, in a phase detector, a feedback-signal;
providing, with the phase detector, a phase-difference-signal representative of a phase difference between the clock-input-signal and the feedback-signal;
providing, with a voltage-controlled-oscillator, a chirp-generator-output-signal based on the phase-difference-signal;
selectively controlling whether or not one or more of a plurality of varactors in a switched-varactor-bank contributes to capacitance of a VCO-circuit;
applying, with a feedback-component, a sequence of different variable-division-factors to the chirp-generator-output-signal in order to provide the feedback signal for the phase-detector, wherein the phase-detector, the voltage-controlled-oscillator, and the feedback-component comprise a phase-locked-loop having a PLL-bandwidth and a rate of change of capacitance of the switched-varactor-bank, when it is controlled to contribute to the capacitance of the VCO-circuit, is slower than the PLL-bandwidth; and
providing varactor-control-signals to the plurality of varactors such that the varactors are sequentially controlled such that they contribute to the capacitance of the VCO-circuit.

14. An automobile system comprising the chirp-generator of claim 1 .

Assignees

• Nxp Bv

Inventors

• Saric Tarik
• Osorio Tamayo Juan Felipe

Classifications

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title

• H03C3/0941

  applying frequency modulation at more than one point in the loop · CPC title

• H03B5/1243 Primary

  the means comprising voltage variable capacitance diodes · CPC title

• G01S7/032

  Constructional details for solid-state radar subsystems · CPC title

• H03L7/197

  a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division {(H03L7/1806 takes precedence)} · CPC title